本論文是利用覆晶的技術，來實現MIC的ku-頻段的低雜訊放大器。由於傳統的MIC電路，在高頻電路的應用上，頻段愈高而波長愈短，傳統的鎊線(Wire Bonding)在高頻操作時所產生寄生效應會影響整體電路的特性表現，不再適用。所以採用覆晶的方式來作為主動元件與被動電路的連結，根據先前學長們製作的金錫凸塊(Au-Sn bump)和建立的模型(model)，觀察出在Ku頻段的寄生效應並不嚴重，因此延用之前實驗的數據和模型，來設計的低雜訊放大器。 在製作覆晶式的低雜訊放大器前，必需先確定金錫凸塊模型、RF pad 模型、被動元件。金錫凸塊模型是為了在模擬小訊號特性的需要，更精準的預測小訊號的特性。RF pad 模型的建立，是利用穩懋(WIN)半導體公司所建立的元件大訊號模型，並加上萃取的RF pad模型和金錫凸塊的模型，以模擬大訊號特性。最後被動元件的模擬，是使用安捷倫ADS momentum來進行電磁模擬，預測被動元件的高頻特性，有了以上的三項結果我們即可設計覆晶式低雜訊放大器。 最後完成了三個ku-頻段覆晶式的低雜訊放大器:(1)尺寸2×50 um單級低雜訊放大器其特性分別為 S11 = -12.6 dB、S22 = -18.9 dB、S21 = 9.22 dB、輸出P1dB功率 = 2.81 dBm、NF = 4.02 dB。(2)尺寸2×50 um兩級低雜訊放大器其特性分別為 S11 = -11.7 dB、S22 = -9.4 dB、S21 = 14.6 dB。(3)尺寸4×85um單級低雜訊放大器其特性分別為 S11 = -12 dB、S22 = -14.5 dB、S21 =9 dB、輸出P1dB功率= 3.9 dBm、NF = 3.3 dB。 In this thesis, microwave integrated circuits (MIC) low-noise amplifier(LNA) in ku-band are demonstrated with flip-chip assembled 0.15 um gate GaAs pseudomorphic high electron mobility transistors (p-HEMTs). When assembling MIC for operation at millimeter-wave frequencies, the use of flip-chip technology is preferable due to its short and stable interconnection as compared with wire bonding. To base on previously research in our lab, we had established the bump model and found relatively low assembly parasitic influence in ku-band. Before to design LNA, we must establish bump model for small signal simulation and RF pad model with device model for large signal simulation. Passive device with using Agilent-ADS EM simulation were carried out. The ku-band MIC LNA designed using the results of the analysis have been fabricated. Finally, we demonstrated three ku-band MIC LNAs, and there are one stage LNA with device size 2×50 um has 9.2 dB gain and 4 dB noise figure、two stage LNA with device size 2×50 um has 14.6 dB gain and one stage LNA with device size 4×85 um has 9 dB gain and 3.4 dB noise figure.
