本論文係以TSMC 0.18-μm CMOS製程，應用於醫療植入通訊服務頻帶之極低功耗壓控振盪器、Ku頻段壓控振盪器與除頻器之研製。 設計的目標針對兩種不同的系統頻段的壓控振盪器設計，以及能操作於高頻的寬頻除頻器。而各電路之特性如下：(1)低功耗壓控振盪器設計，利用選擇較大的電晶體尺寸，使得元件操作於次臨界區，利用此區域低電流操作的特性，在適當的偏壓下取得較大的轉導值，接著找出低操作電流跟Q值的相關性，進而得以設計μW直流消耗的壓控振盪器。量測結果，直流功耗為0.846mW，中心頻率為402MHz，可調範圍為16MHz，相位雜訊為-119.4dBc/Hz，FOM為-172。(2)操作於12.8GHz的低相位雜訊壓控振盪器設計，利用轉導提升的機制，改善考畢茲電路不易起振的問題，並利用考畢茲電路低相位雜訊的特性結合雜訊位移的觀念，並利用較低閃爍雜訊的PMOS元件去取代NMOS元件，讓電路擁有較好的相位雜訊。量測結果，在中心頻率12.8GHz時，偏移主頻1 MHz之相位雜訊為-117.94 dBc/Hz，可調範圍為800MHz，直流功耗為8.53mW，FOM為-190.77。(3)應用於12.8GHz除二的除頻器電路，在設計上利用shunt peaking的機制，抵銷寄生電容對除頻器造成的延遲作用，有效的提高除頻器的操作頻率和頻寬，且能於多種頻帶下操作，簡化在鎖相迴路設計上需設計數個不同操作條件除頻器的問題。整體的可除頻寬為4.5-16.8GHz，頻寬為12.3GHz，功率消耗為13.32mW，FOM為1.26。 The thesis describes the circuits which are implemented in TSMC 0.18-μm CMOS technology. The implemented circuits include an ultra low power VCO for MICS (Medical Implant Communication Service) system, a low phase noise VCO and a wide band frequency divider for Ku band system. These designs focus on VCO circuits and wide band frequency divider which operate in two different bands as follows. (1) The ultra low power VCO utilizing large transistor size can operate in subthreshold region. Therefore, an ultra lower current operation of the MICS VCO is achieved. The correlation between Q factor and current dissipation is found in this study. The implemented MICS VCO dissipates only 0.846mW. The measured performance of VCO is listed below, center frequency is 402MHz, tuning range is 16 MHz, phase noise is -119.4 dBc/Hz at 1MHz offset, and -172 dBc/Hz of Figure-of-Merit (FOM)。(2) A gm-boosted method is adopted to release the start-up condition which can compare with the traditional Colpitts oscillator. PMOS is used for reducing the flicker noise. The implemented Ku-band VCO oscillates in 12.8GHz with the tuning range of 800 MHz under power dissipation of 8.53mW. An excellent phase noise is obtained as -117.94 dBc/Hz at 1MHz offset, which is correspondent to a Figure-of-Merit (FOM) of -190.77 dBc/Hz. (3) The 12.8GHz 1/2-frequency divider employs a shunt peaking method which reduces the influence of the parasitic capacitor. Because of reducing the parasitic capacitor, the deigned frequency divider can enhance the operating frequency and bandwidth. This divider can be used in multi-band, and therefore the complication of phase lock loop can be reduced. The dividable range is from 4.5 to 16.8GHz, which is equivalent to a bandwidth of 12.3GHz. The power dissipation is 13.32mW, and the calculated FOM is 1.26.
