A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes

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題名:	A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes
作者:	Wu,CS;Wu,AY;Lin,CH
貢獻者:	電機工程研究所
關鍵詞:	DIGITAL-FILTERS;FIR FILTERS;ALGORITHM;TRANSFORM;DESIGN;IMPLEMENTATION;COEFFICIENTS;PROCESSOR
日期:	2003
上傳時間:	2010-07-06 18:28:28 (UTC+8)
出版者:	中央大學
摘要:	The coordinate rotational digital computer (CORDIC) algorithm is a well-known iterative method for the computation of vector rotation. For applications that require forward rotation (or vector rotation) only, the angle recoding (AR) technique provides a r
關聯:	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
顯示於類別:	[電機工程研究所] 期刊論文

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