Improvements of amorphous-silicon inverted-staggered thin-film transistors using high-temperature-deposited Al gate with chemical mechanical polishing

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/35539

Title:	Improvements of amorphous-silicon inverted-staggered thin-film transistors using high-temperature-deposited Al gate with chemical mechanical polishing
Authors:	Shih,PS;Chang,TC;Liang,CY;Huang,TY;Chang,CY
Contributors:	光電科學與工程學系
Keywords:	HILLOCK FORMATION;FABRICATION;RESISTIVITY;STABILITY;TFT
Date:	2000
Issue Date:	2010-07-07 14:35:26 (UTC+8)
Publisher:	中央大學
Abstract:	Chemical mechanical polished Al (CMP-Al) films deposited at various temperatures were explored as the gate electrodes of amorphous- silicon (a-Si:H) inverted-staggered thin-film transistors (TFTs) for the first time. Although the surface roughness of the
Relation:	ELECTROCHEMICAL AND SOLID STATE LETTERS
Appears in Collections:	[Department of Optics and Photonics] journal & Dissertation

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