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    請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/52097


    題名: RF Model and Verification of Through-Silicon Vias in Fully Integrated SiGe Power Amplifier
    作者: Liao,HY;Chiou,HK
    貢獻者: 電機工程學系
    關鍵詞: WAFER INTERCONNECT
    日期: 2011
    上傳時間: 2012-03-28 10:15:22 (UTC+8)
    出版者: 國立中央大學
    摘要: This letter proposes an RF model of through-silicon via (TSV) considering both skin-depth and lossy substrate effects up to 20 GHz. The TSV is fabricated in 0.18-mu m SiGe BiCMOS process with the dimensions of 50 mu m in diameter and 100 mu m in depth. The equivalent circuit model is extracted from the measured results and physical structure of a single TSV. The frequency-dependent characteristics of TSV can be completely modeled by frequency-independent lumped elements through parameter extraction. Furthermore, a fully integrated SiGe power amplifier (PA) with TSVs is designed to verify the accuracy of the RF model of TSV. Meanwhile, a PA without TSVs is fabricated to compare the performance of the PA with TSVs. Due to the low parasitic impedance of TSVs, the PA with TSVs achieves better performance than that without TSVs, where the improvement is 0.5 dB in power gain and 2% in power-added efficiency, respectively.
    關聯: IEEE ELECTRON DEVICE LETTERS
    顯示於類別:[電機工程學系] 期刊論文

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