| 摘要: | 在射頻模組中，發射機消耗相當大一部分的直流功率。改善無線發射機之效率對延長行動裝置的通話時間甚有助益。極座標發射機為一可提升發射機效率之架構。本論文將探討極座標發射機中的兩個重要的子電路－波包放大器及功率放大器。在現今的無線通訊系統中，資料率不斷增加。應用於極座標發射機中的波包放大器除了必須具備高效率之特性外也必須承載高頻寬之訊號。線性協助波包放大器是一個可以達成高效率及寬頻的架構。本論文將論述線性協助波包放大器之操作原理與分析、進行設計，並以混成電路的方式實現。以弦波為輸入訊號的量測結果顯示，此波包放大器之操作頻率可至8 MHz，且最大效率值為60%。在極座標發射機中，功率放大器常使用高效率切換式功率放大器，其中則以E類功率放大器為最廣泛使用之架構。本論文將論述E類功率放大器的理論分析及操作原理，並使用一pHEMT電晶體設計並製作一中心頻率為1.75 GHz的E類功率放大器。量測結果顯示，放大器之飽和輸出功率為21 dBm，而汲極效率為50%。現今手機功率放大器除了需要高效率之外，瓦等級之輸出功率也是必要的。我們使用TSMC 0.18-μm CMOS製程設計了一1.95 GHz使用鎊線電感之E類功率放大器；電路架構利用並聯多路電晶體來達到1 W的輸出功率，電晶體採用串疊組態以承受E類功率放大器較大的汲極電壓擺幅。在輸出匹配網路中，使用鎊線實現電感來降低射頻損耗、提高效率。模擬結果顯示，放大器之飽和輸出功率大於30 dBm，汲極效率與PAE在30 dBm輸出功率時皆大於50%及45%。本論文探討了高效率線性協助波包放大器及E類功率放大器之設計，並以混成電路方式實現一波包放大器及功率放大器，成功地驗證了設計概念。In RF modules, transmitter consumes considerable amount of DC power. Improving the power efficiency of wireless transmitter would help extend the talk time of mobile devices. Polar transmitter has been proposed as a high-efficiency transmitter architecture. In this thesis, two important circuit components of polar transmitter, namely, envelope amplifier and power amplifier, are investigated.Due to the ever-increasing data rate in modern communication systems, envelope amplifiers must be able to handle wideband signals while remaining highly efficient. To achieve both high efficiency and wide bandwidth for envelope amplification, one can use linear-assisted envelope amplifiers. In this thesis, the operating principles of linear-assisted envelope amplifiers are introduced. To verify the principles, a hybrid envelope amplifier is designed and implemented. The measurement results show that, with sinusoidal input, the envelope amplifier can operate up to 8 MHz and its peak efficiency is 60%.High-efficiency switching-mode power amplifiers are often adopted in polar transmitters. Among switching-mode power amplifiers, Class-E power amplifier is widely used for RF power amplification. In this thesis, the theory and operating principles of Class-E amplifier are introduced. Following that, a 1.75-GHz Class-E power amplifier using a GaAs pHEMT transistor is designed, fabricated, and measured. Measurement results show that the saturation output power and the drain efficiency of the amplifier are 21 dBm and 50%, respectively.For handset power amplifiers, output power of 1 Watt or above is required. In this work, a 1.95-GHz Class-E power amplifier using bondwire inductor is designed in TSMC 0.18-μm CMOS technology. Output power of 1 W is achieved by combining multiple transistors in parallel. The transistors are in cascade configuration in order to withstand the large voltage swing at the drain, which is a characteristic of Class-E power amplifier. Finally, in output matching network, the inductor is realized using bondwire in order to reduce the RF loss and improve the power efficiency of the amplifier. Simulation results show that the saturation output power of the amplifier is greater than 30 dBm and the drain efficiency and PAE at 30 dBm are greater than 50% and 45%, respectively.In this thesis, the design of high-efficiency linear-assisted envelope amplifier and Class-E power amplifier are investigated. The design concepts are successfully verified by the implemented envelope amplifier and power amplifier. |
