適用於IS-95分碼多工探測接收器的低電壓功率超大型積體電路設計---子計畫二：基於IS-95之數位中頻/基頻轉換器之低電壓低功率數位設計技術(III);Subproject (II): Low-Power Digital Circuit Design Technique for the IS-95 Based CDMA Digital IF/Baseband Down-Converter (III)

NCUIR > College of Electrical Engineering & Computer Science > Department of Electrical Engineering > Research Project > Item 987654321/57262

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/57262

Title:	適用於IS-95分碼多工探測接收器的低電壓功率超大型積體電路設計---子計畫二：基於IS-95之數位中頻/基頻轉換器之低電壓低功率數位設計技術(III);Subproject (II): Low-Power Digital Circuit Design Technique for the IS-95 Based CDMA Digital IF/Baseband Down-Converter (III)
Authors:	周世傑
Contributors:	中央大學電機工程學系
Keywords:	電子電機工程類;電信工程;數位電路設計;接收器;分碼多重存取;中頻﹧基頻轉換器;超大型積體電路;Digital circuit design;Receiver;CDMA;IF/baseband down converter;VLSI;IS-95
Date:	1998-09-01
Issue Date:	2012-10-01 15:17:16 (UTC+8)
Publisher:	行政院國家科學委員會
Abstract:	研究期間 8608 ~ 8707
Relation:	財團法人國家實驗研究院科技政策研究與資訊中心
Appears in Collections:	[Department of Electrical Engineering] Research Project

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