| 摘要: | 本篇論文主要研究使用達靈頓技術實現微波及毫微米波寬頻放大器應用於高速資料傳輸通訊，配合完整的元件量測結果，提出寬頻混合結構達靈頓對的系統化設計與分析方法。利用砷化鎵異質接面雙極性電晶體及高速電子遷移率電晶體製程(HBT-HEMT process)來實現寬頻混合結構達靈頓放大器，並分別針對高速電子遷移率電晶體-異質接面雙極性電晶體(HEMT-HBT)達靈頓放大器、異質接面雙極性電晶體-高速電子遷移率電晶體(HBT-HEMT)達靈頓放大器、高速電子遷移率電晶體-高速電子遷移率電晶體(HEMT-HEMT)達靈頓放大器與異質接面雙極性電晶體-異質接面雙極性電晶體 (HBT-HBT)達靈頓放大器的增益、頻寬與輸入及輸出阻抗等特性分析，進一步探討達靈頓放大器的電晶體尺寸、回授電阻值、串聯提升電感值對增益、頻寬、輸入及輸出阻抗的影響，也成功的提出利用異質接面雙極性電晶體及高速電子遷移率電晶體製程實現混合結構達靈頓放大器的設計方法。另外，配合直接耦合技術(direct-coupled technique) ，此電路可進一步應用於高速資料傳輸通訊中，在四種放大器組態中，高速電子遷移率電晶體-異質接面雙極性電晶體達靈頓放大器與高速電子遷移率電晶體-高速電子遷移率電晶體達靈頓放大器頻率操作範圍可從直流至毫米波頻段，並成功驗證40-Gbps的眼圖量測，與其他三種結構相比，高速電子遷移率電晶體-異質接面雙極性電晶體達靈頓放大器擁有最佳的增益頻寬積，並有較好輸入與輸出返回損耗，此電路所實現增益頻寬積為115.64 GHz。
提出使用達靈頓對實現寬頻與小面積的無電感主動式功率分配器與主動式平衡器的設計方法，此次電路設計主要利用達靈頓對的寬頻特性與小晶片面積等優點。在設計分析中，提出達靈頓對電晶體尺寸對3-dB頻寬、增益與輸出1-dB增益壓縮點的影響，並進一步探討達靈頓對電晶體的尺寸比例與回授電阻值的設計，以同時達到較佳的增益與輸入返回損耗，主動式負載技術(active load technique)亦應用於電路設計中，以達到寬頻與小晶片面積。論文所提出的一級與兩級無電感主動式功率分配器與已發表文獻相比，分別擁有較高的頻寬增益積與晶片面積比值，分別為100.4與60.2 GHz/mm2，輸出振幅誤差皆小於0.1 dB，輸出相位誤差皆小於2度，所提出的電路亦成功通過了OC-192傳輸標準的測試且適用於高速資料傳輸通訊中。在主動式平衡器的設計中，利用一個差動達靈頓放大器來改善電路的3-dB頻寬，利用一個回授電容來補償兩輸出訊號在高頻頻段的相位誤差，此相位誤差由電晶體的寄生效應與兩路徑不同的電路架構所產生，所提出的主動式平衡器實現的3-dB頻寬為21 GHz，小訊號增益為2.5 dB，振幅誤差為1.2 dB以下，相位誤差為5度以下，量測的相位延遲小於30 ps，此電路亦成功驗證12.5-Gbps的眼圖量測中，適合應用於高速資料傳輸通訊中。
提出雙向分佈式放大器(bidirectional distributed amplifier)結合雙向正交相移鍵控調變器/解調器(QPSK modulator/demodulator)。提出一個修改的雙向分佈式放大器架構，用來改善兩輸入訊號端間的隔離度，此外，結合此雙向放大電路架構與雙向正交相移鍵控調變器/解調器，可以實現具有調變與解調功能的雙向訊號傳輸，降低收發機的電路複雜度。在雙向分佈式放大器的設計中，提出修正型雙向分佈式放大器的增益對(gain cell)電路架構，以改善雙向分佈式放大器的3-dB頻寬，此次所提出電路與已發表文獻相比較，擁有較高的增益頻寬積，此電路增益頻寬積為349.2 GHz。在雙向正交相移鍵控調變器/解調器的設計中，提出一個寬頻雙向正交相移鍵控調變器/解調器設計流程。此結合電路進一步進行數位調變及解調變的測試，在訊號調變方面，量測到的正交相移鍵控調變訊號頻譜的誤差向量振幅 (error vector magnitude)為9.9%，在訊號解調變方面，成功驗證到2-Gbps眼圖，適用高速傳輸。
最後，總結了本篇論文所提出的電路設計與所提出的電路未來可以改善的方向與工作。
Several microwave and millimeter-wave broadband circuits using Darlington cell are presented in this dissertation for high speed data communications. Design and analysis of the broadband hybrid Darlington cell are completely presented with the experimented results. Four broadband Darlington amplifiers using a GaAs heterojunction bipolar transistor (HBT)- high electron mobility transistor (HEMT) process are reported in Chapter 2. The gain-bandwidth analysis of the Darlington amplifiers using HEMT-HBT, HBT-HEMT, HEMT-HEMT, and HBT-HBT configurations are presented. The bandwidth, gain, input and output impedances are investigated with transistor size, feedback resistances, and series peaking inductance. The design methodology of the broadband Darlington amplifier in HBT-HEMT process is successfully developed, and the direct-coupled technique is also adopted for high speed data communications. Furthermore, the proposed monolithic HEMT-HBT and HEMT-HEMT Darlington amplifiers are achieved from dc to millimeter-wave, and successfully evaluated with 40-Gbps eye diagram. The HEMT-HBT Darlington amplifier exhibits the highest gain-bandwidth product of 115.64 GHz with good input and output return losses among the four configurations.
Two broadband and compact inductorless active power dividers and an active balun using Darlington cell are presented in Chapter 3, since the Darlington cell exhibits broadband performance and compact chip size. For the inductorless active power dividers, the 3-dB bandwidth, small-signal gain, and OP1dB versus device size ratio of the Darlington cell have been investigated. The feedback resistance and device size ratio of the Darlington cell are discussed for both better small-signal gain and input matching. An active load technique is adopted for the compact chip size and broad bandwidth. The proposed 1- and 2-stage inductorless active power dividers exhibit high gain-bandwidth product per chip area of 100.4 and 60.2 GHz/mm2 with an amplitude imbalance of 0.1 dB and a phase imbalance of 2o, respectively. The proposed power dividers exhibit potential for the ultra-high speed data rate transmission due to successful evaluation using OC-192 transmission mask with a data rate of up to 10-Gbps. For the low imbalance active balun, a differential Darlington amplifier is adopted for the 3-dB bandwidth enhancement. A feedback capacitor is designed to compensate the phase imbalance between two output ports at high frequency caused by parasitic effect of the transistors. The proposed active balun achieves a broad bandwidth of 21 GHz, an average small signal gain of 2.5 dB, a maximum amplitude imbalance of 1.2 dB, and a phase imbalance of less than 5o. The measured group delays of the two paths are lower than 30 ps with low variation for the balun. The active balun is also appropriate for high speed data communications due to successful evaluation of an eye diagram up to 12.5-Gbps.
A monolithic Ka-band bidirectional distributed amplifier (BDA) with a quadrature phase shift keying (QPSK) modulator/demodulator is presented in Chapter 4. A modified BDA topology is proposed to improve the isolation between the bidirectional ports. With the proposed circuit topology, the bidirectional transmission can be achieved with modulation/demodulation to further reduce the complexity of the transceiver. The gain cell of the BDA is investigated for the bandwidth enhancement, and a cascode Darlington amplifier is adopted. The proposed BDA exhibits a high gain-bandwidth product of 349.2 GHz for the forward and reverse paths among the previously published works. For the QPSK modulator/demodulator, a design procedure is summarized. The integrated bidirectional building block is further evaluated in the vector signal characterization of the digital modulation/demodulation. An output spectrum of the QPSK modulation signal is measured, and the measured error vector magnitude (EVM) is less than 9.9%. For the demodulation, the measured eye diagram is evaluated up to 2-Gbps.
Finally, the conclusions and future works are addressed in Chapter 5. |
