現存有許多種指標去衡量一個電容陣列,有鑑於此本論文比較了多個指標,並且使其往一特定方向統合,縮減成績分非線性(INL)和有效位數(ENOB)兩個指標,使得使用者能更快速的利用這兩個指標去判斷不同擺放之間的優劣。 ;Automated layout design on analog circuits can significantly reduce the high error rate of the design, the time complexity of the layout of the high cost of operation and tedious task and expensive design costs. Due to the mismatch sensitive parasitic capacitance effects, components, process variation and gradient effect will lead to the layout result can be a bad layout, also caused inaccuracies and lower product yield. Most of analog circuits such as analog-digital / digital-to-analog converters or filters, etc., and its performance is dependent on accurate capacitance ratio. For most of the requirements of the exact capacitance ratio of the capacitor in parallel using multiple satellites units substituted single and considering a large parasitic capacitance caused by winding, in order to reduce some of the effects of the mismatch.
Now there are too many metric to judging a capacitor array, so we need to unified them into a more accurate indicator. Thus the user can more quickly determine the advantages and disadvantages between the different displays. To let users to assess whether the results meet their desired capacitance.