在本篇論文中，我們著重在研究二維與三維無線晶片網路架構中各處理器之多核心結構的無線多通道路由演算法，並延伸導入光學波導管的設計優化晶片效能。在基於分群（Group-Based）的方式，研究內部路由協定的設計和通道的分配使用，此方式讓晶片內部的核心進行封包資料的交換，目的在於透過分群的無線多通道使用與波導管方法進行設計，以期望能提升晶片整體效能。而在最後，我們使用 OMNeT++為基礎的網路晶片模擬器來模擬我們的方法。;As the technology progress, CPU performance doubles every 18 months. Now the development of VLSI is faced with physics limitation. For past years, CPU performance is increased by raising up CPU frequency. But by the effect of physics limitation, CPU frequency cannot be grown unlimitedly. Therefore, the number of cores on a chip is increased from single core to multi-core. As the number of cores on a chip grows, the computer network concept has been introduced for the architecture of network-on-chip (NoC). More specifically, NoC provides packet switching based communications in order to connect components on the chip. In the meantime, the introduction of RF (radio frequency) interconnect brings the new opportunity for high data rate, low latency and low power consumption for millimeter range on-chip communications for next chip generation.
In this thesis, we focus on the multi-channel wireless routing algorithm for the two-dimensional and/or three-dimensional NoC structures among processor cores and inducts the new waveguide design to enhance performance. We also study the design of internal routing protocols with channel allocation using Group-Based strategy. This design allows the chip cores to accomplish packet switching by means of using wireless multi-channel grouping and waveguide solution. Finally, we use OMNeT++ based NoC simulator to simulate the system performance.
