本論文內容主要探討氮化鋁鎵/氮化鎵場效電晶體使用不同的磊晶表面層對電性的影響進行分析。實驗研究部分分為兩個主題， (1)使用不同活化條件的p型氮化鎵磊晶表面層製作的蕭特基閘極場效電晶體，元件製作前先經過分別為700度5/10/15分鐘氮氣環境中進行活化條件，實驗目的為利用不同的活化條件來活化摻雜於氮化鎵磊晶表面層內的鎂離子，進而改善元件閘極漏電流與暫態特性。(2)使用三種磊晶表面層製作的氮化鋁鎵/氮化鎵金氧半場效電晶體，分別為氮化鎵磊晶表面層(GaN cap)、 p型氮化鎵磊晶表面層(p-GaN cap)、氮化矽磊晶表面層(in-situ SiN cap) ，實驗目的為利用不同的磊晶表面層來提升元件的崩潰電壓和改善元件的閘極漏電流與暫態特性，並尋求取代GaN cap的材料。 不同活化條件的p型氮化鎵磊晶表面層製作的蕭特基閘極場效電晶體，其中p-GaN cap在700℃15分鐘氮氣環境中進行活化條件所製作的元件上有低的閘極漏電流2.74×10-6 A、(I_on/I_off )電流比值為9.06×107、低的次臨界斜率76 mV/dec、較小的電流崩塌現象、和最大的元件崩潰電壓(在汲極電流1 mA/mm下約為1380 V)。其在動態特性方面，元件在汲極電壓100 V下動態電阻比值皆比p-GaN cap 700℃- 10 min與p-GaN cap 700℃- 5 min好。最後利用矽基板偏壓的方式去觀察元件在進行切換開關時電子被表面缺陷或緩衝層缺陷捕捉的情形，其中在p-GaN cap 700℃- 15 min活化條件下的元件在量測結果上觀察到有較不嚴重的表面缺陷暫態行為。 三種磊晶表面層製作的氮化鋁鎵/氮化鎵金氧半場效電晶體，具備in-situ SiN cap元件上有低的閘極漏電流4.16×10-8 A、(I_on/I_off )電流比值為3.83×109、低的次臨界斜率91 mV/dec、較小的電流崩塌現象、較低的介面缺陷密度(Dit)值、最大的元件崩潰電壓(在汲極電流1 mA/mm下約為1248 V)。在動態特性方面，in-situ SiN cap元件在汲極電壓100 V下動態電阻比值皆比p-GaN cap與GaN cap元件好。最後利用矽基板偏壓的方式去觀察元件在進行切換開關暫態分析時，電子被表面缺陷或緩衝層缺陷捕捉的影響程度，其中在in-situ SiN cap元件在量測結果上觀察到比其他二種磊晶表面層元件有較少的表面缺陷，但有較多的緩衝層缺陷，推論元件特性受到表面缺陷影響較大。雖然具p-GaN cap元件的特性比in-situ SiN cap元件較差，但是特性相近，而傳統GaN cap元件特性遠不如上述二種。 ;This study focused on AlGaN/GaN FETs with different cap layers. There were two main parts in this research: (1) HEMTs with p-GaN cap under different activation conditions before device fabrication including 5/10/15 minutes in N2 at 700℃. The purpose was to activate Mg ions in p-GaN cap layer to improve performance on gate leakage and dynamic characteristics. (2) AlGaN/GaN MIS-HEMTs with three kinds of caps including GaN cap, p-GaN cap and in-situ SiN cap. The purpose was to reduce gate leakage, enhance breakdown voltages and dynamic characteristics by alternative cap-layers. HEMTs with p-GaN cap under different activation conditions showed device with 700C-15min activation has best performanve. Gate leakage of 2.74×10-6 mA/mm,(I_on/I_off ) current ratio of 9.06×107, 76 mV/dec of Subthreshold Swing, and breakdown voltage of 1380 V were observed. For transient characteristics, device with 700C-15min activation showed best performance among all activation conditions. MIS-HEMT with in-situ SiN cap showed gate leakage of 4.16×10-8 mA/mm,(I_on/I_off )current ratio of 3.83×107, Subthreshold Swing of 91 mV/dec and breakdown voltage of 1248 V. For transient characteristics, MIS-HEMT with in-situ SiN cap showed the best performance than devices with p-GaN and GaN caps when stress drain voltages being less than 100 V. By using substrate bias scheme, surface trapping behavior is more significant than buffer traps in transient characteristics in this study. Although MIS-HEMT with in-situ SiN cap showed the best performance in DC and transient characteristics, but MIS-HEMT with p-GaN cap showed similar characteristics. Oppoaitely, MIS-HEMT with GaN cap showed the worst device characteristics.
