在現今的系統晶片(System-on-Chip, SOC)設計中，通常同時包含了類比電路與數位電路，然而在傳統的設計流程中，類比電路與數位電路是採用不同的設計以及驗證流程，使得系統整合與驗證變得非常困難。為了發展出快速且可靠的驗證平台，我們根據波動數位濾波器(Wave Digital Filter, WDF)的理論，可以將時間域中的電阻、電容、電感、電壓源等元件一對一地對映至波動域，再加上串聯及並聯的配線器，將類比電路轉換成等效的數位電路，即可用數位電路來模擬類比電路的行為。本篇論文主要在研究如何以FPGA硬體架構實現已轉換為WDF樹狀結構的電路，包含電路元件、配線器、控制單元等，藉由FPGA軟體內建的IEEE 754浮點數電路，我們可以很快地實現WDF中所有的運算單元。經由仿真的結果可以看出，WDF理論確實可在硬體上實現，其電路行為與HSPICE的模擬結果相當一致。;Modern System-on-Chip (SOC) designs usually contain analog and digital circuits. However, it is difficult to simulate them together because the design and verification processes are quite different for analog and digital circuits in traditional design flow. In order to provide a rapid and reliable verification method, we adopt Wave Digital Filter (WDF) theory to map resistors, capacitors, inductors and voltage source to wave domain one-by-one and connect them with serial or parallel adaptors. By this way, analog circuits can be transformed to digital circuits and verified in digital environment together. In this thesis, we focus on studying how to implement the WDF structures on FPGA. With the built-in IEEE 754 floating point circuits in the FPGA software, we can implement all computation elements of WDF rapidly. According to the emulation results, it demonstrates that the WDF theory is possible to be implemented with real hardware, and its behavior is consistent with the simulation results of HSPICE.
