應用於高容量、遠距離傳輸乙太網路之高速 (大於 25 Gbit/sec) 和高線性度累增崩潰檢光二極體之開發( III );The Development of High-Speed (Beyond 25 Gbit/Sec) and High Linearity Avalanche Photodiode for the Applications of High-Capacity and Long-Reach Ethernet( III )

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題名:	應用於高容量、遠距離傳輸乙太網路之高速 (大於 25 Gbit/sec) 和高線性度累增崩潰檢光二極體之開發( III );The Development of High-Speed (Beyond 25 Gbit/Sec) and High Linearity Avalanche Photodiode for the Applications of High-Capacity and Long-Reach Ethernet( III )
作者:	許晉瑋;陳智弘
貢獻者:	國立中央大學電機工程學系
關鍵詞:	累增崩潰檢光二極體;乙太網路;100 Gbit/sec;and 400 Gbit/sec;Avalanche Photodiode;Ethernet network;100 Gbit/sec;400 Gbit/sec
日期:	2018-12-19
上傳時間:	2018-12-20 13:48:33 (UTC+8)
出版者:	科技部
摘要:	和p-i-n 檢光二極體相比，操作在1.55 um 光波長的累增崩潰光二極體 (APD)，其具有較高 (+ ~8 dB)的靈敏度並在近年來的光纖通信市場受到極大的注意。現在，操作在10 Gbit/sec的APD在市場上需求殷切，其主要應用就是在目前美、日等國將架設(或更新)的 10 Gbit/sec 被動光網路。然而和p-i-n 檢光二極體相比， APD因為二次電洞 (或電子) 飄移時間和累增延遲時間，其具有較慢的內部反應速度。此項速度瓶頸，也限制了繼續推進APD的速度以滿足下世代400 Gbit/sec乙太網路的光接收電路需求。在400 Gbit/sec的系統中，能夠操作在每通道速度高達25 或50 Gbit/sec並具有高靈敏度的光接收模組是必須的。除此之外，為了能夠處理系統中可能出現的突發式信號，此接收模組除了有高速、高敏感度的特性外還需具有高線性度的表現。在此計畫中，我們將展示一種新穎、p-side 朝上的平台式APD結構。其以In0.52Al0.48As為累增層並具有部分空乏的吸收層設計。在此結構中，高電場的區域將會大部份局限在元件的底部中央，並不會暴露到空氣或表面。如此，並可以大幅增進元件可靠度的表現。除此之外，部分空乏的吸收層設計可以有效縮短電洞傳輸時間，增進線性度而且不會犧牲效率表現。在APD中為了追求> 25 Gbit/sec高速的表現，薄的In0.52Al0.48As累增層厚度 (< 100 nm) 是需要的。然而此舉卻會大幅增加元件的暗電流，並且可能劣化APD的敏感度。在此計畫中我們會提出一種新穎的應力累增層設計。此設計可以大幅緩解累增層縮薄時暗電流的增加，並改善其噪音表現。我們也會在元件底層使用布拉格反射鏡，以增進其效率表現。綜上所述，我們將會結合上述學校的新元件技術和索爾思公司所將支援的先進封裝技術，來展示可應用於400 (100) Gbit/sec乙太網路且具有高線性度、高靈敏度、高速和高可靠度的光接收模組。 ;Avalanche photodiodes (APDs) which operate at the 1.55m wavelength have recently attracted a lot of attention due to their superior performance in sensitivity to that of p-i-n photodiodes. Now APDs operated at 10 Gbit/sec is very popular and has strong demanding in the market of passive optical network (PON). However, compared with the p-i-n PDs, APDs usually have a much slower internal speed, because of the secondary-hole (or electron) drift-time and avalanche delay time inside its active layer. These bandwidth limiting factors become obstacles to further boost the speed of APD to meet the requirement of next generation (100) 400 Gbit/sec Ethernet. In (100) 400 Gbit/sec fiber communication system, receiver with high sensitivity and can be operated at the data rate as high as 25 or 50 Gbit/sec per channel are necessary. Furthermore, a high-linearity performance in such high-speed/-sensitivity APD is also required due to the appearance of burst-mode signal in the receiving end. In this work, we will demonstrate a novel p-side up mesa type In0.52Al0.48As based APD with partially depleted p-type absorber inside. By utilizing our proposed mesa structure, the high-E field would be strongly confined in the bottom and center parts of device without exposing to the air. This should greatly benefit its reliability performance. In addition, the partially depleted absorber in our structure can effectively shorten the hole drift-time without sacrificing the efficiency performance. In order to pursue such high-speed performance (>25 Gbit/sec) in APD, a thin (< 100 nm) In0.52Al0.48As based multiplication (M-) layer is usually required. However, this would result in a tremendous increase of dark current (and its induced short-noise) and may degrade the sensitivity performance of APD. In this project, we will also adopt a novel design of multiplication layer; “strained multiplication layer”, which can minimize the increase of dark current with the decrease of M-layer thickness. We will also incorporate the DBR layers in the bottom of our active APD to further enhance its efficiency performance. Overall, by combing with the above-mentioned device technology with advanced package technology, which is supported by Source Photonic Company, we will demonstrate a high-linearity/-sensitivity-/ and reliable APD based photo-receiver module for next-generation (100) 400 Gbit/sec Ethernet communication system.
關聯:	財團法人國家實驗研究院科技政策研究與資訊中心
顯示於類別:	[電機工程學系] 研究計畫

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