鐵電場效電晶體於電路、記憶體及仿神經型態應用之分析( I );Analysis of Ferroelectric Fets for Circuits, Memory, and Neuromorphic Applications( I )

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題名:	鐵電場效電晶體於電路、記憶體及仿神經型態應用之分析( I );Analysis of Ferroelectric Fets for Circuits, Memory, and Neuromorphic Applications( I )
作者:	胡璧合
貢獻者:	國立中央大學電機工程學系
關鍵詞:	鐵電;鐵電場效電晶體;負電容;負電容場效電晶體;低功率;遲滯;電路;靜態隨機存取記憶體;變異度;非揮發性;非揮發記憶體;突觸;仿神經;Ferroelectric;ferroelectric field effect transistors (FeFET);negative capacitance;negative capacitance FET (NCFET);low-power;hysteresis;circuit;SRAM;variability;nonvolatile memory;non-volatility;synapse;neuromorphic
日期:	2018-12-19
上傳時間:	2018-12-20 13:49:13 (UTC+8)
出版者:	科技部
摘要:	在此計畫中，我們將對鐵電場效電晶體於電路、記憶體及仿神經型態之應用進行完整的分析及研究。鐵電場效電晶體利用負電容特性，可以降低次臨界擺幅並提升導通電流對漏電流的比率。在此計畫中，我們將研究無遲滯效應之鐵電場效電晶體及電路，也將更進一步研究鐵電場效電晶體的遲滯特性，並應用於非揮發性記憶體及仿神經系統應用。在第一年裡，我們將分析鐵電場效電晶體的類比特性，並考慮鐵電材料參數及本質變異對其類比特性(如轉移電導、輸出電導、本質增益、gm/Ids、截止頻率、最大震盪頻率及線性)之影響，我們也將分析鐵電場效電晶體之跨導運算放大器(OTA)的變異特性。在第二年裡，我們將建立模擬流程及架構，分析鐵電場效電晶體的時間相關之動態切換特性。我們將與考慮時間相關的Landau-Khalatnilkov方程式，建立其Verilog-A模型，並探討矯頑電場(coercive field)、殘餘極化量(remanent polarization)、鐵電材料的厚度以及黏滯係數，對於鐵電場效電晶體的漏電延遲邏輯電路之影響。在第三年，我們將研究以鐵電場效電晶體為基底的靜態隨機存取記憶體，分析其在超臨界與次臨界區域的漏電特性、穩定度以及變異度。我們將更進一步探討在低功耗應用上，分析製程變異和鐵電材料參數，對於鐵電場效電晶體非揮發式靜態隨機存取記憶體之單元的影響。在第四年，我們將分析2T和3T鐵電場效電晶體非揮發式記憶體，並研究鐵電材料的參數對於非揮發式記憶體的寫入時間、讀取時間、切換功率，以及功率流失之影響。在第五年，我們將利用鐵電場效電晶體為突觸，並分析其在仿神經系統中之特性，也將建立仿神經型態的模擬架構，去分析神經元峰值的相對時間對觸發權重的影響。另外，我們也將研究鐵電材料參數的變異度，對鐵電場效電晶體元件電路相互作用之影響。此外，我們也將在此計畫中進行鐵電場效電晶體之元件製作，在這個計畫中，藉由鐵電場效電晶體之量測數據與數值模擬結果，我們將研究且提出元件/電路設計準則，以提升鐵電場效電晶體在電路、記憶體以及神經型態系統的特性。 ;In this project, we will conduct a comprehensive study of the ferroelectric field effect transistors (FeFETs) for circuits, memory, and neuromorphic applications. FeFETs utilize the negative capacitance of the ferroelectric material integrated in the gate stack to achieve steep subthreshold slope switching, and higher Ion/Ioff ratio for ultra-low power applications. In this project, hysteresis-free FeFETs are investigated to enhance the circuit performance; while FeFETs with hysteresis characteristics are explored for nonvolatile memory and neuromorphic applications. In the first year of this project, the impact of ferroelectric material parameters and intrinsic process variations on the analog characteristics of FeFETs will be analyzed. The analog characteristics including the transconductance (gm), the output conductance (gds), the intrinsic gain (gm/gds), gm/IDS, cut-off frequency (fT), maximum oscillation frequency (fmax), linearity and the FeFET-based operational transconductance amplifier (OTA) will be investigated. In the second year, we will establish the simulation framework to capture the time-dependent dynamic switching characteristics for FeFETs. We will establish the Verilog-A model considering time-dependent Landau-Khalatnikov equation and investigate the impact of coercive field, remanent polarization, ferroelectric layer thickness, and viscosity coefficient on the leakage-delay of FeFET logic circuits. The FeFET circuits considering negative capacitance effect and intrinsic process variations will be analyzed. In the third year, we will investigate the stability, variability, performance and leakage of FeFET based SRAM in the superthreshold and sub-/near-threshold regions. We will further investigate the FeFET-based nonvolatile SRAM cells considering the process and ferroelectric parameter variations for ultra-low power applications. In the fourth year, FeFET-based nonvolatile 2T and 3T memory will be analyzed to explore the variation-tolerant design. The impact of ferroelectric parameter variations on the write time, read time, switching energy, and leakage power for FeFET nonvolatile memory will be examined. In the fifth year, FeFET based synapse for neuromorphic systems will be analyzed, and we will establish the neuromorphic simulation framework to analyze the impact of relative timing of neuron spikes on the synaptic weight. We will fabricate the FeFET, and analyze the measurement results. Based on the experimental measurements combined with our simulation framework, the circuit-device interaction for FeFET based memory and neuromorphic systems will be investigated considering the impact of ferroelectric parameter variations. In this project, we will explore and investigate the device/circuit design guideline to enhance the performance of FeFET based circuits, memory, and neuromorphic systems.
關聯:	財團法人國家實驗研究院科技政策研究與資訊中心
顯示於類別:	[電機工程學系] 研究計畫

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