本篇論文為解決系統性錯誤在尺寸小的晶圓中判別力不足的問題，在九種系統性錯誤中針對其中六種有特別症狀的錯誤進行分割分析，分別分割成該特徵圖形之晶圓圖，並使用隨機性與均質性檢測來檢測分割後的晶圓以增強該特徵之系統性錯誤，藉由分割前與分割後的晶圓圖比較來觀察其判別效果。 藉由分割成各種不同的形狀後，我們藉由隨機性與均質性檢測，來實際檢測分割後的晶圓圖，在隨機性檢測上使用假設檢定的方式，在對立假設上假設是「是否是過度群聚」，檢定虛無假設使用單尾檢定，所以檢查B-score > 1.64，同樣，如果對立假設是「是否是反群聚」，檢定虛無假設使用單尾檢定，所以檢查B-score <- 1.64，如果對立假設是「是否是非隨機」，檢定虛無假設使用雙尾檢定，所以檢查B-score > 1.96 ，之後，即可畫出閘門圖(Gateway Diagram)，將其分成五區。在均質性檢測則使用良率參數，針對切割後的良率相差大於一定閥值，來協助判別其晶圓圖錯誤。 針對不同的錯誤型態，使用不同的分割方式來判別，例如:藉由控制甜甜圈分割的半徑，來針對不同錯誤型態，藉以偵測損壞晶粒分布，經由切割後，再使用隨機性與均質性檢測方法來作判別。最後將檢測之結果合在一起，提高判別系統性錯誤之能力，進而提高良率及降低成本等目的。 ;The systematic error is hard to distinguish in small diesize wafer. In order to solve the problem, this paper analyze six kinds of symptomatic failure types among the nine kinds of systematic errors. Each of failure types have been cut into different shapes. The randomness and homogeneity test are used to enhance the detection resolution of systematic error after doing wafer partition. Then, we observe the resolution ratio in systematic error after doing partition. After cutting into various shapes, we use the randomness and homogeneity test to test each wafer. In randomness test, the hypothesis test is used. If the alternative hypothesis is over-cluster, the null hypothesis is determined to use a one-tailed test. And, we will check whether B-Score is higher than the critical value 1.64 or not. If the alternative hypothesis is non-random, the null hypothesis is determined to use two-tailed tests. Then, check the absolute value of B-Score is higher than 1.96 or not. Finally, you can draw a gateway diagram and divide it into five blocks. In the homogeneity test, we choose the yield parameter to support us to analyze wafer. If the yield difference of wafer is higher than the threshold after doing partition, the wafer may have systematic error. Different partition method is used to distinguish different failure types. For example, we change the radius of the donut partition wafer to detect the edge-ring failure type and the defect position. Then, the applications of randomness and homogeneity test is used for the wafer after doing partition. Finally, the results of the test are combined to enhance the systematic errors resolution, so as to improve the yield and reduce costs.
