此篇論文針對IEEE 802.11a收發機間的多種問題進行模擬，包括更正傳送機有能量損耗時的自動增益控制、更正收發機取樣頻率不同步的取樣時序回復模組、更正載波頻率不同步之載波頻率偏移更正模組、並針對多路徑通道與時變通道中的通道估計模組探討，並以VHDL語言設計基頻收發機系統，最後下載至FPGA發展板上，以訊號產生器與邏輯分析儀進行實作驗證。 Some practical problems for an OFDM transceiver applied to WLAN are studied in this thesis, which include automatic gain control, sample timing offset, carrier frequency offset, and channel tracking in the time-varying channel. The IEEE 802.11a system is simulated and then a baseband prototype is designed with VHDL. Finally, the hardware implementation is verified on Xilinx FPGAs.
