隨著無線通訊技術的進步，5G已經開始蓬勃發展。在物聯網與車用電子等部分中，資料的傳輸速度與資料量是十分重要的，且高速射頻板RFSoC的開發後， 5G的傳輸速度與資料量也越來越被受矚目。在本論文中選擇參考在長期演進技術下行鏈路( LTE DownLink )架構下的OFDM調變系統來開發傳輸速度與資料量高的收發機模組，進行修改與擴充，並在FPGA平台實現。 在硬體中以Verilog硬體描述語言設計並實現多路並行的 OFDM 發射機與接收機，而平台上使用FPGA( Field Programmable Gate Array )板子實現。發射機訊號處理模組中設計了串列與並列轉換處理器、星座圖映射器、參考訊號與訊框產生器、子載波映射器、快速反傅立葉處理器以及循環字首產生器。在接收機方面的模組包括了訊號同步器(包括符元時間同步、載波頻率同步)、快速傅立葉處理器、解子載波擺放器、解訊框架構、通道估測以及通道等化器。 ;With the progress of the technologies of wireless communication, 5G system has been continued to thrive and flourished for the better. The data rate and throuthput of IoT (Internet of Things) and IoV (Internet of Vehicle) are vital poins to be considered. Especially with the development of high-speed RF board of RFSoC, the data rate and throughput of 5G system have been attracted more attention. In this research, we select the OFDM modulation system under the LTE DownLink architecture to develop transceiver modules with high-speed and high data rate, and use this demoststratic to modify and pexpand it, finally, to implement it on the FPGA platform. In hardware, we use verilog hardware description language to conduct design and implement multiple parallel OFDM transceiver. On platform, we use FPGA (Field Programmable Gate Array) board. The transmitter includes parallel-to-serial processor, constellation mapper, reference signal and frame structure, subcarrier allocation, IFFT processor and cyclic prefix inserter. The receiver includes signal synchronizer (includes symbol synchronizer and subcarrier frequency synchronizer), FFT processor, de-subcarrier allocation, de-frame structure, channel estimator and channel equalizer.
