English  |  正體中文  |  简体中文  |  全文筆數/總筆數 : 80990/80990 (100%)
造訪人次 : 41264208      線上人數 : 634
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
搜尋範圍 查詢小技巧:
  • 您可在西文檢索詞彙前後加上"雙引號",以獲取較精準的檢索結果
  • 若欲以作者姓名搜尋,建議至進階搜尋限定作者欄位,可獲得較完整資料
  • 進階搜尋


    請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/92844


    題名: 基於RFSoC平台的LEO衛星通 訊時變通道模擬器的設計與實現;Design and Implementation of Time-Varying Channel Emulator for LEO Satellite Communications with RFSoC Platform
    作者: 徐溥謙;Hsu, Pu-Chien
    貢獻者: 通訊工程學系
    關鍵詞: 軟體定義無線電;RFSoC;LEO;Farrow Interpolator;Cordic;Time-Varing Channel
    日期: 2023-04-20
    上傳時間: 2024-09-19 16:23:05 (UTC+8)
    出版者: 國立中央大學
    摘要: 近年來,隨著衛星小型化及有效載荷系統不斷進步,以及低軌火箭運載成本的降低,使得衛星通訊除了軍事用途外,也開始快速朝向商業化發展。衛星
    通訊擁有極高的覆蓋性、高資料傳輸率,以及傳輸較不易受天然災害影響,這些優勢讓低軌道衛星擁有了很好的商業價值。為了確保在未來地面接收站能接收衛星發射回來的訊號,我們做了一個低軌道衛星的通道模擬器,在衛星還沒上太空前先模擬太空中會產生的訊號延遲、頻率偏移及大氣環境的訊號衰減,未來地面站才能更加穩定收到我們的衛星訊號。
    本論文在ZCU111之FPGA硬體架構設計與實現低軌道衛星的通道模擬,在FPGA上產生單載波訊號經過DAC/ADC收回來後,依照低軌道衛星的規格做時變延遲、相位變化以及訊號增益達到模擬衛星之訊號。本篇論文之硬體架構包含BlockRAM模組、Farrow Interpolator模組、相位旋轉模組、訊號增益模組以及RF Data Converter來實現低軌道衛星經過通道後的收發。
    ;In recent years, with the continuous improvement of satellite miniaturization and payload system, as well as the reduction of the cost of low-orbit rockets, satellite communications have begun to rapidly develop towards commercialization in addition to military applications. Satellites have extremely high coverage, high data transmission rates, and transmissions are less susceptible to natural disasters. These advantages make low-orbit satellites have good commercial value. In order to ensure that the ground receiving station can receive the signal transmitted by the satellite in the future, we have made a low-orbit satellite channel simulator. Before the satellite goes into space, simulate the signal delay, frequency offset and signal attenuation of the atmospheric environment in space, so that the ground station can receive our satellite signal more stably in the future.
    This thesis designs and realizes the channel simulation of low-orbit satellites on the FPGA hardware architecture of ZCU111. After the single-carrier signal is generated on the FPGA and retrieved by DAC/ADC, time-varying delay, phase change and signal gain are performed according to the specifications of low-orbit satellites. Reaching the signal of analog satellite. The hardware architecture of this paper includes BlockRAM module, Farrow Interpolator module, phase rotation module, signal gain module and RF Data Converter to realize the effect produced by low-orbit satellites.
    顯示於類別:[通訊工程研究所] 博碩士論文

    文件中的檔案:

    檔案 描述 大小格式瀏覽次數
    index.html0KbHTML14檢視/開啟


    在NCUIR中所有的資料項目都受到原著作權保護.

    社群 sharing

    ::: Copyright National Central University. | 國立中央大學圖書館版權所有 | 收藏本站 | 設為首頁 | 最佳瀏覽畫面: 1024*768 | 建站日期:8-24-2009 :::
    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - 隱私權政策聲明