中大機構典藏-NCU Institutional Repository-提供博碩士論文、考古題、期刊論文、研究計畫等下載:Item 987654321/95623
English  |  正體中文  |  简体中文  |  全文笔数/总笔数 : 80990/80990 (100%)
造访人次 : 41265937      在线人数 : 883
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
搜寻范围 查询小技巧:
  • 您可在西文检索词汇前后加上"双引号",以获取较精准的检索结果
  • 若欲以作者姓名搜寻,建议至进阶搜寻限定作者字段,可获得较完整数据
  • 进阶搜寻


    jsp.display-item.identifier=請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/95623


    题名: 一個全新考量稀疏性的資料映射策略以減緩 AI 加速器中的老化效應;A Novel Sparsity Aware Data Mapping Strategy for Mitigating Aging Effects in Systolic-array-based AI Accelerator
    作者: 柯蓉鈁;Ke, Jung-Fang
    贡献者: 電機工程學系
    关键词: 人工智慧加速器;老化效應;AI Accelerator;Aging Effects
    日期: 2024-07-12
    上传时间: 2024-10-09 17:06:30 (UTC+8)
    出版者: 國立中央大學
    摘要: 在人工智慧(Artificial Intelligence, AI)領域中,卷積神經網絡(Convolutional Neural
    Networks, CNN)因其強大的特徵提取能力而受到青睞,尤其在圖像識別、物件偵測和圖
    像分割等任務中,都展現了高效的表現。為了充分利用卷積神經網絡,人工智慧加速器
    被開發出來以加速 CNN 的運算效率,其中最為廣泛應用的架構之一是脈動陣列(Systolic
    Array)。脈動陣列架構包含多個處理元件(Processing Element, PE),組成類似陣列的結
    構以執行乘加運算(Multiply-Accumulate, MAC),並且因其規律且高度平行的計算能力,
    脈動陣列有效提升了整體加速器的運算效能。
    然而,脈動陣列內部 PE 的可靠性會受到老化效應的影響,例如負偏壓溫度不穩定
    性(Negative Bias Temperature Instability,NBTI)、正偏壓溫度不穩定性(Postivie Bias
    Temperature Instability,PBTI)和熱載子注入(Hot Carrier Injection, HCI)。這些老化效
    應會導致 PE 計算出錯,從而降低加速器的計算準確度。此外,由於卷積神經網絡模型
    的稀疏性(Sparsity),脈動陣列在運算時會有部分 PE 未被使用,這會導致 PE 之間的老
    化不均衡,使得部分 PE 受老化影響比其他 PE 更嚴重,進而讓這些 PE 過早失去運算功
    能,最終引發整體加速器計算錯誤和準確度下降。
    為了克服這些挑戰,我們提出了一種考量模型稀疏性的資料映射策略,目的在於減
    輕脈動陣列中老化引起的壓力。通過利用權重和輸入的稀疏性,我們的方法使老化效應
    均勻分佈在 PE 之間,從而延長整體加速器的使用壽命。實驗結果顯示,採用我們提出
    的資料映射策略,可以使人工智慧加速器的使用壽命延長 1.5 至 2 倍,同時面積開銷可
    忽略不計。
    ;In the field of Artificial Intelligence (AI), Convolutional Neural Networks (CNNs) are
    highly favored for their powerful feature extraction capabilities, particularly in tasks such as
    image recognition, object detection, and image segmentation. To fully leverage CNNs, AI
    accelerators have been developed to enhance CNN computation efficiency, with the systolic
    array being one of the most widely applied architectures. The systolic array architecture
    comprises multiple Processing Elements (PEs) arranged in an array-like structure to perform
    Multiply-Accumulate (MAC) operations. Due to its regular and highly parallel computational
    capabilities, the systolic array effectively boosts the overall performance of accelerators.
    However, the reliability of the PEs within a systolic array is affected by aging effects, such
    as Negative Bias Temperature Instability (NBTI), Positive Bias Temperature Instability (PBTI),
    and Hot Carrier Injection (HCI). These aging effects can cause PE computation errors, thereby
    reducing the accuracy of the accelerator. Additionally, the sparsity of CNN models results in
    some PEs being underutilized during computation, leading to uneven aging among PEs. This
    imbalance causes certain PEs to degrade more rapidly than others, which can lead to premature
    failure of some PEs, resulting in overall computation errors and reduced accuracy.
    To address these challenges, we propose a sparsity-aware data mapping strategy to
    mitigate aging-induced stress in systolic arrays. By leveraging the sparsity of weights and inputs,
    our method ensures that aging effects are evenly distributed across PEs, thereby extending the
    overall lifespan of the accelerator. Experimental results demonstrate that our proposed data
    mapping strategy can extend the lifespan of AI accelerators by 1.5 to 2 times, with negligible
    area overhead.
    显示于类别:[電機工程研究所] 博碩士論文

    文件中的档案:

    档案 描述 大小格式浏览次数
    index.html0KbHTML28检视/开启


    在NCUIR中所有的数据项都受到原著作权保护.

    社群 sharing

    ::: Copyright National Central University. | 國立中央大學圖書館版權所有 | 收藏本站 | 設為首頁 | 最佳瀏覽畫面: 1024*768 | 建站日期:8-24-2009 :::
    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - 隱私權政策聲明