應用於第五代行動通訊 FR1 頻段小型基地站之連續模式與多悌氮化鎵單晶與準單晶微波積體電路功率放大器之研製;Implementations on Continuous Mode and Doherty GaN MMIC and Quasi-MMIC Power Amplifier Designs for 5G NR FR1 Microcell Applications

NCUIR > College of Electrical Engineering & Computer Science > Graduate Institute of Electrical Engineering > Electronic Thesis & Dissertation > Item 987654321/95719

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/95719

Title:	應用於第五代行動通訊 FR1 頻段小型基地站之連續模式與多悌氮化鎵單晶與準單晶微波積體電路功率放大器之研製;Implementations on Continuous Mode and Doherty GaN MMIC and Quasi-MMIC Power Amplifier Designs for 5G NR FR1 Microcell Applications
Authors:	林信潔;Lin, Hsin-Chieh
Contributors:	電機工程學系
Keywords:	第五代行動通訊;小型基地站;單晶微波積體電路;連續模式;多悌;功率放大器;5G NR;Microcell;MMIC;Continuous Mode;Doherty;Power Amplifier
Date:	2024-07-25
Issue Date:	2024-10-09 17:11:39 (UTC+8)
Publisher:	國立中央大學
Abstract:	本篇論文之主旨係針對「應用於第五代行動通訊 FR1 頻段小型基地站之連續模式與多悌氮化鎵單晶與準單晶微波積體電路功率放大器」之設計與討論，論文利用穩懋半導體公司 (WINTM) 所提供之0.45-µm 、0.25-µm 碳化矽氮化鎵製程與砷化鎵整合式被動元件製程分別設計應用於5G NR FR1 n77、n78、n79頻段之小型基地台功率放大器。考慮到成本與未來進行更複雜電路設計的可能，除了單晶以外也採用了準單晶的組合式結構。為了能讓運作時產生的熱量充分散逸，採用了板上晶片黏著與磅線組裝，並且依據電磁模擬結果決定其組裝的磅線數量與長度。電路結構以多悌和連續模式兩種操作模式分別設計。其中一組多悌準單晶兩級功率放大器達到操作頻寬3.35 - 4.2 GHz，在連續波模式輸出飽和功率41.08 dBm，最高增益 20.3 dB，最高功率附加效率 28.2%。其中兩組J 類連續模式準單晶兩級功率放大器分別達到操作頻寬2.85 - 4.48 GHz 與2.84 - 4.47 GHz，在脈衝波模式輸出飽和功率40.3 dBm與40.0 dBm，增益 21.7 dB 與 21.6 dB，最高功率附加效率 39.3% 與 36.5%。其中一組F 類連續模式單晶兩級功率放大器達到輸出功率頻寬為3.6 - 5.4 GHz，在連續波模式輸出飽和功率41.08 dBm，最高增益 20.4 dB，最高功率附加效率 50.9%。並且對本論文所設計組裝之四組功率放大器進行實際操作下的溫度量測，經由量測得到功率放大器於連續波或脈衝波操作模式下之晶片溫度推算其故障前之平均時間，確認其在實際安裝操作下的可行性。;The main purpose of this dissertation is to develop the "Implementations on Continuous Mode and Doherty GaN MMIC and Quasi-MMIC Power Amplifier Designs for 5G NR FR1 Microcell Applications". This dissertation adopted the 0.45-µm and 0.25-µm gallium nitride on silicon carbide processes and gallium arsenide integrated passive device process provided by WINTM Semiconductors to design power amplifiers for microcell base stations in the 5G NR FR1 n77, n78, and n79 bands. Considering cost and the possibility of more complex circuit designs in the future, Quasi-MMIC structures were used. To ensure effective heat dissipation during operation, chip-on-board and wire bonding assembly techniques were employed. The selection of the number and length of bonding wires was confirmed by electromagnetic simulation results. The circuit structures were designed for both Doherty and continuous modes. The Doherty Quasi-MMIC two-stage power amplifier achieved an operational bandwidth of 3.35 - 4.2 GHz, a continuous-wave output saturation power of 41.08 dBm, a maximum gain of 20.3 dB, and a maximum power-added efficiency of 28.2%. The two continuous Class J mode Quasi-MMIC two-stage power amplifiers achieved operational bandwidths of 2.85 - 4.48 GHz and 2.84 - 4.47 GHz, pulse-mode output saturation powers of 40.3 dBm and 40.0 dBm, gains of 21.7 dB and 21.6 dB, and maximum power-added efficiencies of 39.3% and 36.5%, respectively. The continuous Class F mode MMIC two-stage power amplifier achieved an output power bandwidth of 3.6 - 5.4 GHz, a continuous-wave output saturation power of 41.08 dBm, a maximum gain of 20.4 dB, and a maximum power-added efficiency of 50.9%. The dissertation also incorporates temperature measurements for the four power amplifiers that were designed and assembled. These measurements confirm the applicability of the amplifiers in both continuous-wave and pulse-mode operations, as well as the robustness of their chip temperatures and mean time to failure.
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

Files in This Item:

File	Description	Size	Format
index.html		0Kb	HTML	17	View/Open

社群 sharing

Loading...