使用覆晶技術之微波與毫米波積體電路

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姓名

林柏安(Po-an Lin) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

使用覆晶技術之微波與毫米波積體電路
(Microwave and Millimeter Wave Integrated Circuits with Flip-chip Technique)

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摘要(中)

本論文將覆晶技術(Flip-Chip)應用於幾個矽基微波電路中，為之後矽基微波電路的覆晶應用做初步的實現。第一個電路為覆晶式3.5 GHz Doherty功率放大器，此覆晶式Doherty放大器的組成是將電晶體部分覆晶至自己製作的被動元件上，藉由氧化鋁基板上高Q值的被動元件來提升整體放大器的效率。最後量測的結果，在輸出功率1-dB增益壓縮點提前6 dB處，有著20 %的功率增進效率表現。
第二個覆晶式電路為覆晶式W頻帶CMOS放大器，與先前的覆晶式Doherty電路不同，此覆晶式W頻帶CMOS放大器為直接覆晶製作完成的W頻帶CMOS放大器晶片於氧化鋁基板上，並在氧化鋁基板上加入覆晶轉接電路的設計。量測結果顯示透過適當的轉接電路設計，可以確實的補償覆晶凸塊的寄生效應對電路造成的影響。
最後一個電路為V頻帶的切換式天線陣列，採用巴勒矩陣的架構。其矩陣與天線陣列皆為氧化鋁基板上的被動元件所組成，透過耦合器與延遲線的設計來實現由巴勒矩陣的不同輸入端輸入，在輸出端會得到不同相位差的結果。目前只有製作被動元件的部分，之後會加入主動電路部分來完成整個覆晶式天線陣列的應用。

摘要(英)

Two microwave integrated circuits (MICs) with flip-chip assembled are demonstrated in the master thesis. The first circuit is a 3.5 GHz Doherty power amplifier with flip-chip assembled. The flipped chip consists of just transistors. Passive elements are developed on Al2O3 ceramics for high Q factor. Efficiency of the PA can be improved by the high Q passive elements. Measured results show 20 % PAE at 6-dB back-off from OP1dB.
The second circuit is W-band CMOS power amplifier with flip-chip assembled. Different with the previous one, this flipped chip consists whole PA circuit. Besides, some transition network are made on Al2O3 ceramics. By appropriate transition network design, parasitics of the bump can be compensated.
Last circuit is V-band switching antenna array by the use of Bulter matrix. The matrix part and anntnna array are made on Al2O3 ceramics. By couplers and delay lines, output signals at output ports of Bulter matrix shows specific phase difference when the input signal is injected into different input ports. For future work, we will add active circuits to realize the switching antenna array with flip-chip assembled.

關鍵字(中)

★ 覆晶
★ 微波積體電路

關鍵字(英)

★ flip-chip
★ microwave integrated circuit

論文目次

目錄
摘要 IV
Abstract V
致謝 VI
圖目錄 IX
表目錄 XIII
第一章導論 1
1.1電子封裝發展 1
1.2覆晶技術應用於微波積體電路的相關研究成果 3
1.3論文架構 3
第二章覆晶技術與被動元件製作 5
2.1簡介 5
2.2覆晶凸塊製作 5
2.3覆晶凸塊等效電路模型 9
2.4被動元件設計與製作 12
2.4.1被動元件製作流程 12
2.4.2被動元件模擬與量測 16
2.5結論 20
第三章覆晶式射頻Doherty功率放大器 21
3.1簡介 21
3.2 Doherty功率放大器工作原理[17][19] 21
3.3電路設計 24
3.3.1覆晶式單級放大器設計 25
3.3.2方向耦合器設計 29
3.3.3補償線(offset line)設計 30
3.3.4九十度延遲線設計 32
3.3.5四分之一波長阻抗轉換器設計 33
3.3.6整體覆晶式Doherty功率放大器設計 34
3.4結論 38
第四章覆晶式W頻帶 CMOS放大器 39
4.1簡介 39
4.2覆晶轉接電路簡介 40
4.3覆晶式W頻帶CMOS放大器電路設計 41
4.3.1 W頻帶CMOS放大器電路架構 41
4.3.2覆晶轉接電路架構 43
4.3.3覆晶式電路模擬與量測 45
4.4結論 53
第五章應用於V頻帶之切換式天線相位陣列 54
5.1簡介 54
5.2巴勒矩陣工作原理 55
5.3應用於V頻帶巴勒矩陣設計 58
5.3.1矩陣架構 58
5.3.2耦合器設計 60
5.3.3延遲線設計 62
5.3.4矩陣設計 62
5.3.5天線以及天線陣列設計 63
5.4巴勒矩陣實作與量測 66
5.5結論 71
第六章結論 72
參考文獻 73
附錄A 口試問題回答 77

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指導教授

辛裕明(Yue-ming Hsin)

審核日期

2010-8-25

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