摘要(英) |
In this thesis, it transforms Poisson’s equation, electron continuity equation and hole continuity equation to equivalent circuit model for 1D and 2D numerical device simulation. This thesis uses the equivalent circuit model to simulate PNPN device. Firstly, this thesis builds 1D PNPN to quickly find the design parameters such as length and doping due to the fast calculation in 1D simulation. Secondly, this thesis develops quasi-2D simulation because the quasi-2D is very close to 1D simulation and it can be used to develop the complete 2D simulation for 2D PNPN design. This thesis compares the qusi-2D simulation result with that of the 1D simulation. Finally, this thesis develops the complete 2D modeling for 2D PNPN simulation, and it proposes some good suggestions for reducing the pain suffering during 2D PNPN simulation.
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參考文獻 |
[1] P.C.H Chan and C.T. Sah, “Exact Equivalent Circuit Model for Steady-state Characterization of Semiconductor Devices with Multiple-Energy-Level Recombination Centers,” IEEE Transactions Electron Devices, vol. ED-26, no.6, pp.924-936,1979.
[2] K. Mayaram and D.O. Pederson, “Coupling Algorithms for Mixed-Level Circuit and Device Simulation, ” IEEE Transactions on Computer-Aided Design, vol.11, no.8,1992.
[3] D. K. Cheng, “Field and Wave Electromagnetic,” 2nd ed., Addison-Wesley Publishing Company, Inc., 1989.
[4] C. L. Teng, “An equivalent circuit approach to mixed-level device and circuit simulation, ” M.S. Thesis, institute of EE, National Central University, Taiwan, Republic of China, June.1997.
[5] M.Hatle and J. Vobecky, “A New Approach to the Simulation of Small-Signal Current Gains of pnpn Structures,” IEEE Transactions on Electrons on Electron Devices, vol. 40, no.10, pp. 1864-1866, Oct. 1993.
[6] Donald A. Neamen.“Semiconductor Physics and Devices, Third Edition” Chapter 15, McGraw-Hill, 2003.
[7] A. B. Israel. “Newton’s method with modified functions,” Contemporary Math., Vol. 204, pp. 39–50, 1997.
[8] S. S. Kuo. “Computer application of numerical method,” Additions-Wesley Pub. Co. 1972.
[9] C.C. Chang,“Verification of 1D BJT Numerical Simulation and its Application to Mixed-Level Device and Circuit Simulation” M.S. Thesis, Institute of EE, National Central University, Taiwan, Republic of China, June, 2001.
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