P型通道銻化物異質介面場效電晶體之元件發展與特性分析

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：34

、訪客IP：3.135.207.201

姓名

高宗延(Zong-yan Gao) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

P型通道銻化物異質介面場效電晶體之元件發展與特性分析
(Device Development and Analysis of P-Channel Sb-based Heterojunction Field-Effect Transistors)

相關論文

★ 電子式基因序列偵測晶片之原型	★ 增強型與空乏型砷化鋁鎵/砷化銦鎵假晶格高電子遷移率電晶體: 元件特性、模型與電路應用
★ 使用覆晶技術之微波與毫米波積體電路	★ 注入增強型與電場終止型之絕緣閘雙極性電晶體佈局設計與分析
★ 以標準CMOS製程實現之850 nm矽光檢測器	★ 600 V新型溝渠式載子儲存絕緣閘雙極性電晶體之設計
★ 具有低摻雜Ｐ型緩衝層與穿透型Ｐ＋射源結構之600V穿透式絕緣閘雙極性電晶體	★ 雙閘極金氧半場效電晶體與電路應用
★ 空乏型功率金屬氧化物半導體場效電晶體設計、模擬與特性分析	★ 高頻氮化鋁鎵/氮化鎵高速電子遷移率電晶體佈局設計及特性分析
★ 氮化鎵電晶體 SPICE 模型建立與反向導通特性分析	★ 加強型氮化鎵電晶體之閘極電流與電容研究和長時間測量分析
★ 新型加強型氮化鎵高電子遷移率電晶體之電性探討	★ 氮化鎵蕭特基二極體與高電子遷移率電晶體之設計與製作
★ 整合蕭特基p型氮化鎵閘極二極體與加強型p型氮化鎵閘極高電子遷移率電晶體之新型電晶體	★ 垂直型氧化鎵蕭特基二極體於氧化鎵基板之製作與特性分析

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

[檢視]

[下載]

本電子論文使用權限為同意立即開放。
已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。
請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。

摘要(中)

銻化物系列具有高潛力應用於數位電路功能，其中銻化銦鎵合金系統擁有所有化合物半導體塊材中最高的電洞遷移率，而為了實現互補式電路的需求，低功率損耗跟高電洞遷移率的傳輸特性是必須的。本論文以第一型態能帶結構的銻化銦鎵/銻化鋁為標準結構進行材料磊晶與元件設計研究。基於提高磊晶的傳輸特性及元件特性，我們對磊晶做了調整，也同時分析元件電性，來尋找磊晶與元件的最佳化。另一方面，為了電路應用的需要，我們成功以氫氣電漿製作世界第一顆增強型P型通道銻化銦鎵/銻化鋁異質接面場效電晶體。
在磊晶方面的調整一共分為三個部份，第一部分是將通道上方磊晶層厚度做調整，藉此提高元件閘極的調控能力；第二部分為調整主動區磊晶層的長晶溫度，藉此將銻化銦鎵/銻化鋁量子井最佳化；第三部分為調整下方的蝕刻停止層與緩衝層厚度，藉此避免次通道效應產生，此外並加入參雜源來提高元件直流與高頻特性。為了進一步提升元件的性能，我們製作次微米T型閘極元件，在閘極長度為0.2 μm，源極與汲極間距2 μm的元件上，臨限電壓為0.62 V。汲極飽和電流於汲極偏壓為-3.0 V時得到66 mA/mm，轉導值為94 mS/mm，高頻增益部分fT、fMAX分別為15 GHz與22.1 GHz。另一方面，我們發現利用氫氣電漿不僅可成功製作增強型元件，氫氣電漿還可以用來修復缺陷和被破壞的晶格，並且提升元件閘極的調變能力。增強型元件在閘極長度為0.2 μm，源極與汲極間距1 μm的元件上，臨界電壓為0.025 V。在汲極偏壓為-3.0 V時，汲極最大飽和電流為61 mA/mm，轉導峰值為83 mS/mm，次臨限擺幅為107 mV/dec，高頻增益部分fT、fMAX分別為14.8 GHz與22.4 GHz。

摘要(英)

Sb-based materials have demonstrated high potential for high-speed logic and digital electronics due to their highest electron and hole mobilities among compound semiconductors. Added by their low-power consumption, complementary circuit devices can thus be realized using the materials system. We used type-I band-aligned InGaSb/AlSb layer structure for this study. We started with the adjustment of the growth conditions of the epitaxial layer structures to optimize the characteristics of the epi-layers. Subsequently, we analyzed the transfer properties of the fabricated devices to obtain the relationship between the epi-layer and devices. Moreover, we used the hydrogen plasma to fabricate and demonstrate the first enhancement-mode InGaSb/AlSb device in the world.
The optimized epi-layers were systematically investigated by three parts: the first one was to reduce the thickness of the structure layer above the channel to improve the gate control capability; the second one was to adjust the growth temperature of the quantum well for optimizing; and the third one was to vary the thickness ratio of etching stop layer and the buffer layer to reduce the second channel effect. Additionally, we added the dopant to enhance the device dc and rf properties. E-beam writing lithography was used to fabricate the submicron T-gate devices in this work. In a device with 0.2 μm gate length and 2 μm source-to-drain spacing, where Vth is about 0.62 V, dc performance of IDSS = 66 mA/mm and gm,peak = 94 mS/mm and rf performance of fT = 15GHz and an fMAX = 22.1 GHz at a drain voltage of -3.0V were successfully demonstrated. On the other hand, we found that the way of hydrogen plasma not only converts the D-mode device to E-mode one, but also improves the defects and the destroyed lattice. In an E-mode device with 0.2 μm gate length and 1 μm source-to-drain spacing, where Vth is about 0.025 V, dc performance of ID,max = 61 mA/mm, gm,peak = 83 mS/mm S.S. = 107 mV/dec and rf performance of fT = 15GHz and an fMAX = 22.1 GHz at a drain voltage of -3.0V were successfully demonstrated.

關鍵字(中)

★ 銻化物
★ 電洞通道
★ 氫氣電漿
★ 異質介面場效電晶體
★ 銻化銦鎵

關鍵字(英)

★ Sb-based
★ p-channel
★ hydrogen plasma
★ HFET
★ InGaSb

論文目次

摘要 I
ABSTRACT II
圖目錄 VI
表目錄 XI
第一章導論 1
1-1 研究動機 1
1-2 P型通道異質接面場效電晶體之發展現況 4
1-3 增強型元件發展 11
1-4 論文架構 16
第二章磊晶與材料物性分析 17
2-1 前言 17
2-2 標準INGASB/ALSB磊晶結構(EPI 461) 17
2-3 應力對能帶結構的影響 20
2-4 上阻擋層厚度調整之INGASB/ALSB磊晶結構 22
2-4-1 11 nm上阻擋層厚度之InGaSb/AlSb磊晶結構(Epi 757) 22
2-4-2 8 nm上阻擋層厚度之InGaSb/AlSb磊晶材料與結構(Epi 649) 24
2-5 主動區長晶溫度調整之INGASB/ALSB磊晶結構 26
2-5-1 460℃長晶溫度的磊晶結構(Epi 807) 26
2-5-2 430℃長晶溫度的磊晶結構(Epi 809) 28
2-5-3 400℃長晶溫度的磊晶結構(Epi 822) 29
2-6 ALGASB/ALSB厚度調整之INGASB/ALSB磊晶結構 31
2-6-1 AlGaSb/AlSb為300/1200 nm之磊晶結構(Epi 838) 31
2-6-2 AlGaSb/AlSb為200/1300 nm之磊晶結構(Epi 861) 32
2-7 溫度對磊晶所造成的影響 35
2-8 結論 37
第三章元件製程發展與製作流程 38
3-1 前言 38
3-2 元件製作流程 38
3-2-1 傳輸線模型 38
3-2-2 無鈍化層元件製作流程 39
3-2-3 次微米T型閘極製作流程 42
3-3 利用氫氣電漿作表面處理的製作流程 46
3-4 結論 51
第四章 P型通道銻化銦鎵/銻化鋁HFET之元件特性 52
4-1 前言 52
4-2 不同厚度之上阻擋層ALSB的IN0.4GA0.6SB/ALSB HFET元件 52
4-2-1 22nm上阻擋層AlSb之元件 (Epi 461) 52
4-2-2 11nm上阻擋層AlSb之元件 (Epi 757) 55
4-2-3 8 nm上阻擋層AlSb之元件 (Epi 649) 57
4-3 不同主動區長晶溫度的IN0.4GA0.6SB/ALSB HFET元件 59
4-3-1 460℃主動區長晶溫度之元件 (Epi 807) 59
4-3-2 430℃主動區長晶溫度之元件 (Epi 809) 61
4-3-3 400 ℃主動區長晶溫度之元件 (Epi 822) 63
4-4 ALGASB/ALSB厚度之IN0.4GA0.6SB/ALSB HFET 66
4-4-1 Al0.7Ga0.3Sb/AlSb為300/1200 nm之元件 (Epi 838) 66
4-4-2 Al0.7Ga0.3Sb/AlSb為200/1300 nm之元件 (Epi 861) 69
4-5 增強型P型通道IN0.4GA0.6SB/ALSB HFET元件 71
4-6 次微米元件 73
4-6-1 Epi 838之空乏型HFET元件 73
4-6-2 Epi 861之空乏型HFET元件 75
4-6-3 Epi 838之增強型HFET元件 78
4-7 結論 80
第五章元件討論與比較 81
5-1 前言 81
5-2 上阻擋層ALSB厚度對元件特性的影響 81
5-3 主動區長晶溫度對元件性能之影響 84
5-3-1 不同主動區長晶溫度之元件性能比較 84
5-3-2 主動區長晶溫度對缺陷的影響 89
5-4 ALGASB與ALSB之厚度對元件性能的影響 96
5-5 次微米元件之討論 100
5-6 增強型/空乏型元件之討論 105
5-7 結論 110
第六章結論與未來發展 111
參考文獻 113
附錄1 元件製作流程 117
附錄1-1 標準無鈍化層製作流程 117
附錄1-2 T型閘極製程 120
附錄1-3 氫氣電漿表面處理製程 121

參考文獻

[1]. J. B. Boos, W. Kruppa, B. R. Bennet, D. Park and S. W. Kirchofer, “AlSb/InAs HEMTs for low-voltage, high-speed applications,“ IEEE Trans. Electron Devices, vol. 45, pp. 1869-1875, 1998.
[2]. C. Nguyen, B. Brar, C. R. Bolognesi, J. J. Pekarik, H. Kroemer and J. H. English, “Growth of InAs/AlSb quantum wells having both high mobilities and high electron concentrations,” J. Electron. Mat., vol. 22, pp. 255-258, 1992.
[3]. C. A. Chang, R. Ludeke, L. L. Chang and L. Esaki, “Molecular-beam epitaxy(MBE) of In1-xGaxAs and GaSb1-yAsy,” Appl. Phys. Lett., vol. 31, pp. 759-761, 1977.
[4]. M. Yano, Y. Suzuki, T. Ishii, Y. Matsushima and M. kimata, “Molecular beam epitaxy of GaSb and GaSbxAs1-x,” Jpn. J. Appl. Phys., vol. 17, pp. 2091-2096, 1978.
[5]. R. Ludeke, “Electronic properties of (100) surfaces of GaSb, InAs and their alloys with GaAs,” IBM J. Res. Dev., vol. 22, pp. 304-314, 1978.
[6]. S. Adachi, “Optical dispersion relations for GaP, GaAs, GaSb, InP, InAs, InSb, AlxGa1-xAs and In1-xGaxAsyP1-y,” J. Appl. Phys., vol. 66, pp. 6030-6040, 1989.
[7]. I. Vurgaftman, J. R. Meyer and L. R. Ram-Mohan, “Band parameters for III–V compound semiconductors and their alloys,” Appl. Phys. Lett., vol. 89, pp. 5815-5875, 2001.
[8]. B. R. Bennett, R. Magno, J. B. Boos, W. Kruppa, M. G. Ancona, “Antimonide-based compound semiconductors for electronic devices: A review,“ Solid-State Electron, vol. 49, pp. 1875-1895, 2005.
[9]. F. L. Schuermeyer, P. Cook, E. Martinez, and J. Tantillo, “Band alignment in heterostructures”, Appl. Phys. Lett., vol. 55, pp. 1877-1878, 1989.
[10]. B. R. Bennett, M. G. Ancona, J. B. Boos and B. V. Shanabrook, “Mobility enhancement in strained p-InGaSb quantum wells,” Appl. Phys. Lett., vol. 91, pp. 042104-042106, 2007.
[11]. J. B. Boos, B.R. Bennett, N. A. Papanicolaou, M. G. Ancona, J. G. Champlain, R. Bass and B. V. Shanabrook, “High mobility p-channel HFETs using strained Sb-based materials,” Electron. Lett., vol. 43, pp. 834-835, 2007.
[12]. J. B. Boos, B. R. Bennet, N. A. Papanicolaou, M. G. Ancona, J. G. Champlain, Y. C. Chou, M. D. Lange, J. M. Yang, R. Bass, D. Park and B. V. Shanabrook, “Sb based n- and p-channel heterostructure FETs for high-speed, low-power applications,” IEICE Trans. Electron., vol. E91-C, pp. 1050-1057, 2008.
[13]. M. Radosavljevic, T. Ashley, A. Andreev, S. D. Coomber, G. Dewey, M. T. Emeny, M. Fearn, D. G. Hayes, K. P. Hilton, M. K. Hudait, R. Jefferies, T. Martin, R. Pillarisetty, W. Rachmady, T. Rakshit, S. J. Smith, M. J. Uren, D. J. Wallis, P. J. Wilding and Robert Chau, “High performance 40nm gate length InSb p-channel compressively strained quantum well field effect transistors for low-power (VCC=0.5V) logic applications,” IEEE International Electron Devices Meeting, pp. 1-4, 2008.
[14]. Aneesh Nainani, Ze Yuan, Tejas Krishnamohan, Brian R. Bennett, J. Brad Boos, Matthew Reason, Mario G. Ancona, Yoshio Nishi, and Krishna C. Saraswat, “InxGa1-xSb channel p-metal-oxide-semiconductor field effect transistors:Effect of strain and heterostructure design,” J. Appl. Phys., vol. 110, pp. 014 503-1–014 503-9, 2011.
[15]. A. L. Corrion, K. Shinohara, D. Regan, I. Milosavljevic, P. Hashimoto, P. J. Willadsen, A. Schmitz, D. C. Wheeler, C. M. Butler, D. Brown, S. D. Burnham, and M. Micovic, "Enhancement-Mode AlN/GaN/AlGaN DHFET With 700-mS/mm gm and 112-GHz ft," IEEE Elec. Dev. Lett., vol. 31, pp. 1116-1118, 2010.
[16]. D. H. Kim, J. A. del Alamo, "30 nm E-mode InAs PHEMTs for THz and future logic applications," IEEE International Electron Devices Meeting, pp. 1-4, 2008.
[17]. J. A. Robinson, S. E. Mohney, J. B. Boos, B. P. Tinkham, and B. R. Bennett, “Pd/Pt/Au ohmic contact for AlSb/InAs0.7Sb0.3 heterostructures,” Solid-State Electron, vol. 50, pp. 429-432, 2006.
[18]. E. F. Chor, W. K. Chong and C. H. Heng, “Alternative (Pd,Ti,Au) contacts to (Pt,Ti,Au) contacts for In0.53Ga0.47As,” J. Appl. Phys., vol. 84, pp. 2977-2979, 1998.
[19]. K. J. Chen, T. Enoki, K. Maezawa, K. Arai, and M. Yamamoto, "High-performance InP-based enhancement-mode HEMTs using non-alloyed ohmic contacts and Pt-based buried-gate technologies," IEEE Transactions on Electron Devices, vol. 43, pp. 252-257, 1996.
[20]. S. Kim, H. Hwang, and I. Adesida, “Measurements of thermally induced nanometer-scale diffusion depth of Pt/Ti/Pt/Au gate metallization on InAlAs/InGaAs high-eletron-mobility transistors,” App. Phys. Lett., vol 87, pp. 232102-1-232102-3, 2005.
[21]. W. Zhao, et al., "Monolithic integration of thermally stable enhancement-mode and depletion-mode InAlAs/InGaAs/InP HEMTs utilizing Ir-gate and Ag-ohmic contact technologies," IEEE International Electron Devices Meeting, pp. 1-4, 2006.
[22]. R. Wang, P. Saunier, Y. Tang, T. Fang, X. Gao, S. Guo, G. Snider, P. Fa, D. Jena, and H. Xing, " Enhancement-Mode InAlN/AlN/GaN HEMTs With10−12 A/mm Leakage Current and 1012 ON/OFF Current Ratio," IEEE Elec. Dev. Lett., vol. 32, pp. 309-311, 2011.
[23]. Y. Cai, Y. Zhou, K. M. Lau, and K. J. Chen, "Control of Threshold Voltage of AlGaN/GaN HEMTs by Fluoride-Based Plasma Treatment: From Depletion Mode to Enhancement Mode," IEEE Trans. Electron Devices, vol. 53, pp. 2207-2215, 2006.
[24]. P. K. Chu, “Recent developments and applications of plasma immersion ion implantation,” J. Vac. Sci. Technol. B, vol. 22, pp. 289–296, 2004.
[25]. H. K. Lin, “The Design, Growth, and Characterization of Antimonide-Based Composite-Channel Heterostructure Field-Effect Transistors,” Ph.D. dissertation, UC Santa Barbara, 2004.
[26]. J. W. Matthews and A. E. Blakeslee, “Defects in epitaxial multilayers. I. Misfit dislocations,” Jour. Crys. Grow., vol. 27, pp.118-125, 1974.
[27]. C. C. Liao, “Antimonide-Based Field-Effect Transistors And Heterojunction Bipolar Transistors Grown By Molecular Beam Epitaxy,” Ph.D. dissertation, UI Urbana-Champaign, 2011.
[28]. B. R. Bennett, J. B. Boos, M. G. Ancona, N. Papanicolaou, J. G. Champlain, R. Bass, and B. V. Shanabrook, “Mobility Enhancement in Strained Antimonide Quantum Wells” M. Scie Tech, 2008.
[29]. 廖耕瑩,“銻化銦鎵/銻化鋁高電洞遷移率異質接面場效電晶體之發展,”碩士論文,國立中央大學,2010.
[30]. B. R. Bennett, S. A. Khan, J. B. BOOS, N. A. Papanicolaou, and V. V. Kuznetsov, “AlGaSb Buffer Layers for Sb-Based Transistors,” J. Elec. Mate., vol. 39, pp. 2196-2202, 2010.
[31]. H. C. Ho, Z. Y. Gao, H. K. Lin, P. C. Chiu, Y. M. Hsin, and J. I. Chyi, “Device Characteristics of InGaSb/AlSb High-Hole-Mobility FETs,” Elec. Dev. Lett, 2012.
[32]. J. D.Wiley, “Chapter 2 mobility of holes in III–V compounds,” Semicond. Semimetals, vol. 10, pp. 91–174, 1974.
[33]. P. R. Berger, K. Chang, P. Bhattacharya, J. Singh, and K. K. Bajaj, “Role of strain and growth conditions on the growth front profile of InxGa1−xAs on GaAs during the pseudomorphic growth regime,” Appl. Phys. Lett., vol. 53, pp. 684–686, 1988.
[34]. M. J. Ekenstedt, S. M. Wang, and T. G. Andersson, “Temperature-dependent critical layer thickness for In0.36Ga0.64As/GaAs single quantum wells,” Appl. Phys. Lett., vol. 58, pp. 854-855, 1991
[35]. N. Chaturvedi, U. Zeimer, J. Würfl and G. Tränkle, ”Mechanism of ohmic contact formation in AlGaN/GaN high electron mobility transistors,” Semicond. Science Technology, vol. 21, pp. 175-179, 2006.
[36]. Y. Todokoro, “Double-Layer Resist Films for Submicrometer Electron-Beam Lithography,” IEEE Solid State Circuits, vol. 15, pp. 508-513, 1980.
[37]. 陳沛煜,“銻化物高電子遷移率場效電晶體之閘極微縮製程發展與元件特性研究,”碩士論文,國立中央大學,2011.
[38]. G. Piaszenski, “Basic Resist Theory,” Raith GmbH (http://www.raith.com/).
[39]. D. H. Kim, J. A. del Alamo, J. H. Lee, and K. S. Seo, "Logic Suitability of 50-nm In0.7Ga0.3As HEMTs for Beyond-CMOS Applications," IEEE Trans. Electron Devices, vol. 54, pp. 2606-2613, 2007.
[40]. C. H. Chen, C. W. Yang, H. C. Chiu, and Jeffrey. S. Fu, “Characteristic comparison of AlGaN/GaN enhancement-mode HEMTs with CHF3 and CF4 surface treatment”, J. Vacu. Scie. Tech. B, vol. 30, p. 021201-1-021201-6, 2012

指導教授

辛裕明(Yue-ming Hsin)

審核日期

2012-9-19

推文