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姓名 吳梓豪(Zi-Hao Wu) 查詢紙本館藏 畢業系所 電機工程學系 論文名稱 生成鍺奈米量子點與鍺奈米殼於絕緣層基板上之應用研究
(Formation of Ge Quantum Dot and Shell for Si on Insulator Applications)相關論文 檔案 [Endnote RIS 格式]
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摘要(中) 本論文延續本實驗室已開發之複晶矽鍺柱/氮化矽/矽氧化生成鍺量子點之製程方法，更進一步詳細探討不同氧化條件與退火方式對於鍺量子點的形貌與內部缺陷之影響。同時將此方法運用於複晶矽鍺柱/氮化矽/SOI基板上，可以進一步實現一體成形之鍺/二氧化矽/GOI異質結構，有利於鍺場效電晶體與光電晶體之閘極工程應用。
本文利用穿透式電子顯微鏡（TEM）、能量散佈光譜儀（EDX mapping）與拉曼量測等材料分析方法來了解探討不同的氧化、退火等熱預算對於鍺量子點以及鍺殼的晶格形貌、結晶性、晶格方向、缺陷、矽鍺濃度與應力之演進改變。發現鍺量子點對於鄰近週遭氮化矽以及矽材之催化作用可加速氮化矽及矽材的局部氧化反應，該反應所釋放之矽原子部份再擴散融入鍺量子點之中造成鍺量子點在氮化矽與矽之中的移動，而且所融入的矽含量之多寡會明顯地改變鍺量子點的形貌。
本文對於藉由選擇性氧化生成之奈米鍺量子點及鍺殼與氧化熱預算之關連性進行系列性的探討分析。所提出之厚度均勻、受到壓應力且具固定晶格方向的矽鍺殼層不僅可自我對準於鍺量子點，而且擁有良好品質的二氧化矽介電層於二者之間，因此可作為後續鍺場效電晶體與光電晶體之閘極堆疊層與通道之應用。摘要(英) This thesis continuously studied the formation of Ge QDs using thermal oxidation of poly-SiGe pillar/Si3N4/Si heterostructure in our lab, and further discussed the dependence of morphology and internal defects of Ge QD between oxidation and annealing conditions. Meanwhile, the author used this process on poly-SiGe pillar/ Si3N4/Si on insulator substrate in order to realize Ge/SiO2/Si on insulator heterostructure advantaging in the gate engineering of Ge MOSFET and phototransistor.
This thesis used transmission electron microscopy (TEM), energy dispersive X-ray (EDX) mapping and Raman analysis to investigate the evolution of morphology, crystallinity, lattice orientation, defects, Ge concentration and stress of Ge QD and shell under different thermal budget by modifying oxidation and annealing conditions. The author found that Ge QD catalytically enhances the local oxidation of underlying Si3N4 and Si. The released Si atoms diffuse into Ge QD and make the migration of Ge QD in Si3N4 and Si. In addition, the quantity of Si inward Ge QD obviously changes the morphology of Ge QD.
This thesis investigated the relationship between Ge QD/shell using selective oxidation and thermal budget. The demonstrated SiGe shell with uniform thickness, subject to compressive stress and stable (111) lattice orientation not only can be used in self-aligned Ge QD but also have good SiO2 quality between Ge QD and shell. Therefore, this heterostructure can be used as the application of gate stack and the channel of Ge MOSFET and phototransistor.關鍵字(中) ★ 鍺量子點
★ 鍺殼
★ 絕緣層基板關鍵字(英) 論文目次 中文摘要 I
英文摘要 III
致謝 V
目錄 VII
圖目錄 VIII
表目錄 VI
第一章 簡介 1
1-1 使用鍺作為光電元件的原因 1
1-2 製作鍺電晶體的技術問題 2
1-3 GOI結構作為電晶體的優點與其在製作上的困難 2
1-4 研究動機 4
1-5 論文架構 4
第二章、形成鍺量子點之前製矽鍺柱關鍵製程開發與退火環境對鍺量子點結晶性之影響 9
2-1 前言 9
2-2 具有垂直輪廓之矽鍺柱蝕刻參數調整與其負載效應 10
2-3 在氮化矽中形成鍺量子點的製作方法 12
2-4 回顧鍺量子點在氮化矽中形成機制 13
2-5 加入退火製程修補鍺量子點內部的結晶缺陷 14
第三章、形成矽鍺殼於絕緣層基板上之方法 22
3-1 回顧矽鍺殼/矽異質結構之製作 22
3-2 絕緣層上矽鍺殼的製程開發 25
3-2-1 SOI的矽層減薄製程與矽鍺殼在絕緣層上的製作流程 26
3-2-2 SOI的矽層厚度估算 26
3-3 矽鍺殼在絕緣層上之薄膜結構 28
第四章、矽鍺殼之晶格結構控制與應力分析 45
4-1 前言 45
4-2 矽鍺殼之晶格方向掌控 45
4-3 矽鍺殼幾何尺寸對應力之影響 46
第五章、總結與未來展望 55
參考文獻 57參考文獻 [1] G. E. Moore, “Cramming more components onto integrated circuits,” Electronics, 38, 114, 1965.
[2] Intel Corp
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[5] W. C. Dash, et al., “Intrinsic optical absorption in single-crystal germanium and silicon at 77 K and 300 K,” Physical Review, vol. 99, p. 1151, 1955.
[6] J. Bardeen and W. H. Brattain, “The transistor, a semi-conductor triode,” Phys. Rev., 74, 230-231, 1948.
[7] Tatsuro Maeda, et al., “High Mobility Ge-on-Insulator p-Channel MOSFETs Using Pt Germanide Schottky Source/Drain,” IEEE El. Dev. Lett., 26, 102-104, 2005.
[8] 劉傳璽、陳進來，「半導體元件物理與製程理論與實務」，261頁，2006。
[9] Tze-chiang Chen, et al., “Method for fabricating SiGe-on-insulator (SGOI) and Ge-on- insulator (GOI) substrates,“ US 7084460 B2, 8-9, 2006.
[10] S. Takagi, “Re-examination of subband structure engineering in ultra-short channel MOSFETs under ballistic carrier transport”, VLSI Symp. Digest, 115, 2003.
[11] M. H. Kuo, et al., “Designer Ge quantum dots on Si: A heterostructure configuration with enhanced optoelectronic performance,” Appl. Phys. Lett., 101, 223107, 2012.
[12] Kuan-Hung Chen, et al., “Controlled Heterogeneous Nucleation and Growth of Germanium Quantum Dots on Nanopatterned Silicon Dioxide and Silicon Nitride Substrates,” Cryst. Growth Des., 11, 3222-3226, 2011
[13] 王慶奇，「利用奈米圖案技術形成三維鍺量子點陣列的研製及其特性分析」，國立中央大學，碩士論文，2011。
[14] 陳致均，「自我對準電極鍺量子點單電子/電洞電晶體之製作與特性分析」，國立中央大學，碩士論文，2008。
[15] James D.Plummer, et al., “Silicon VLSI Technology: Fundamentals,Practice and Modeling,” 637-649, 2000.
[16] 郭銘浩，「量身訂作鍺量子點以應用於近紅外線光偵測元件之研製」，國立中央大學，碩士論文，2013。
[17] Ching-Chi Wang, et al., “The curious case of exploding quantum dots:anomalous migration and growth behaviors of Geunder Si oxidation,” Nano Lett, 8, 192, 2013.
[18] Medeiors-Ribeiro G and Williams RS, “Thermodynamics of coherently-strained GexSi1-x nanocrystals on Si(001): alloy composition and island formation,” Nano Lett, 7(2), 223–235, 2007.
[19] C. O. Chui, et al., “Germanium MOS capacitors incorporating ultrathin high-k gate dielectric,” IEEE El. Dev. Lett., 23, 473-475, 2002.
[20] Y.-J. Yang, et al., “Electron mobility enhancement in strained-germanium n-channel metal-oxide-semiconductor field effect transistors,” Appl. Phys. Lett., 91, 102103, 2007.
[21] D. Kuzum, “INTERFACE-ENGINEERED GE MOSFETS FOR FUTURE HIGH PERFORMANCE CMOS APPLICATIONS,” Stanford University, 2009.
[22] Tatsuro Maeda, et al., “Thin-body Ge-on-insulator p-channel MOSFETs with Pt germanide metal source/drain,” 508, 345-350, 2006.指導教授 李佩雯(Pei-Wen Li) 審核日期 2013-11-28 推文 plurk
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