English  |  正體中文  |  简体中文  |  Items with full text/Total items : 80990/80990 (100%)
Visitors : 41644338      Online Users : 1108
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
Scope Tips:
  • please add "double quotation mark" for query phrases to get precise results
  • please goto advance search for comprehansive author search
    •  Adv. Search
    Home ‧ Login ‧ Upload ‧ Help ‧ About ‧ Administer Goto mobile version

    Category

    Loading community tree, please wait....

    Year

    Loading year class tree, please wait....

    Items for Author "謝易叡" 

    Return to Browse by Author

    Showing 5 items.

    Collection Date Title Authors Bitstream
    [電機工程學系] 研究計畫 2020-12-08 仿生運算於AI晶片之開發與應用：建構通用型類神經網路技術平台與異質晶片整合於圖片辨識之應用(1/3);Developments and Applications of AI chip by Neuromorphic Computing: Construction of General Neuron-Network Technology Platform and Hetero-Integration of AI Chip in Recognition of Images(1/3) 謝易叡
    [電機工程學系] 研究計畫 2021-03-25 仿生運算於AI晶片之開發與應用：建構通用型類神經網路技術平台與異質晶片整合於圖片辨識之應用( II );Developments and Applications of AI chip by Neuromorphic Computing: Construction of General Neuron-Network Technology Platform and Hetero-Integration of AI Chip in Recognition of Images( II ) 謝易叡
    [電機工程學系] 研究計畫 2022-07-26 仿生運算於AI晶片之開發與應用：建構通用型類神經網路技術平台與異質晶片整合於圖片辨識之應用( III );Developments and Applications of Ai Chip by Neuromorphic Computing: Construction of General Neuron-Network Technology Platform and Hetero-Integration of Ai Chip in Recognition of Images( III ) 謝易叡
    [電機工程學系] 研究計畫 2023-07-17 探索記憶體內運算的未知邊界：同時具備儲存、計算、搜尋功能的四位單胞雙阻變閘三態內容定址非揮發記憶體晶片之設計與實作( II );Exploration of Unknown Boundary for the In-Memory Computation: Designs and Implementations of Memory Chips Composed of the 4-Bit-Per-Cell 2t Resistive-Gate Tcam Nvms for Storage, Computation, and Search( II ) 謝易叡
    [電機工程學系] 研究計畫 2024-09-27 探索記憶體內運算的未知邊界: 同時具備儲存、計算、搜尋功能的四位單胞雙阻變閘三態內容定址非揮發記憶體晶片之設計與實作( III );Exploration of Unknown Boundary for the In-Memory Computation: Designs and Implementations of Memory Chips Composed of the 4-Bit-Per-Cell 2t Resistive-Gate Tcam Nvms for Storage， Computation， and Search( III ) 謝易叡

    ::: Copyright National Central University. | 國立中央大學圖書館版權所有 | 收藏本站 | 設為首頁 | 最佳瀏覽畫面: 1024*768 | 建站日期：8-24-2009 :::
    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - 隱私權政策聲明