應用傳輸線變壓器與功率結合技術於全積體化功率放大器之研究

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：33

、訪客IP：3.21.247.78

姓名

黃亭堯(Ting-Yao Huang) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

應用傳輸線變壓器與功率結合技術於全積體化功率放大器之研究
(The Study on Transmission Line Transformer andPower-Combining Techniques for Fully Integrated PowerAmplifier Design)

相關論文

★ 應用於筆記型電腦數位電視單極天線之研製	★ 應用於數位機上盒與纜線數據機之電纜多媒體傳輸標準多工濾波器
★ 印刷共面波導饋入式多頻帶與超寬頻天線設計	★ 微波存取全球互通頻段前向匯入式功率放大器與高效率Class F類功率放大器暨壓控振盪器電路之研製
★ 應用於矽基功率放大器與混頻器之傳輸線型變壓器研究	★ 應用於V-頻段射頻收發機前端電路之低功耗源極注入式混頻器之研製
★ 應用積體電路上方後製程與整合被動元件於互補式金氧半導體製程之系統封裝研究	★ 應用fT-倍頻電路架構於毫米波壓控振盪器與注入鎖定除頻器之研製
★ 應用傳輸線型變壓器於X/K–Ka/V頻段全積體整合之寬頻互補式金氧半導體功率放大器研製	★ 應用於K / V 頻段低功耗混頻器之研製
★ 應用於K/V頻段之低功耗CMOS低雜訊放大器之研究	★ 應用於5-GHz CMOS射頻前端電路之低電壓自偏壓式混頻器與高線性化功率放大器之研製
★ 應用於 K 頻段射頻接收機之寬頻低功耗 CMOS 低雜訊放大器之研製	★ 應用磁耦合變壓器於K頻段之低功耗互補式金氧半導體壓控振盪器研製
★ 應用於K頻段之單向化全積體整合功率放大器與應用於V頻段之寬頻功率放大器研製	★ 應用於C/X頻段全積體整合之互補式金氧半導體寬頻低功耗降頻器與寬頻功率混頻器之研製

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

[檢視]

[下載]

本電子論文使用權限為同意立即開放。
已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。
請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。

摘要(中)

本論文架構以實現不同的功率結合器，並達到高傳輸效率，與阻抗轉換為目
標，共分為兩大部分: 功率結合變壓器與傳輸線形態功率結合變壓器。第一部分
分別設計兩個功率放大器搭配功率結合變壓器: “利用並聯功率結合變壓器之
CMOS 功率放大器”與“差動功率結合變壓器之E 類功率放大器”，並實現在
tsmcTM 0.18 μm CMOS 製程上，應用於2.4 GHz 頻段。第一設計為利用兩組AB
類差動對，搭配並聯型態的變壓器來結合四組放大器的輸出功率；第二設計為利
用一對E 類差動放大器，搭配變壓器來結合兩組放大器的輸出功率。第二部分
為利用傳輸線型態變壓器做功率結合，設計“應用傳輸線變壓器功率結合技術之
K 頻帶功率放大器”，採用AB 類功率放大器實現於WINTM 0.15 μm pHEMT 製程
上，應用於K 頻帶。
設計結果量測如下: 利用並聯功率結合變壓器之功率放大器，增益為19.8
dB，輸入反射損失約為10.2 dB，輸出反射損失為5.3 dB，1-dB 功率增益壓縮點
輸出功率約為20.9 dBm，飽和輸出功率為26.7 dBm，最高功率增進效益為24.8
%，晶片面積為1.4 × 1.37 mm2 ；差動功率結合變壓器之E 類功率放大器，增益
為12.98 dB， 1-dB 功率增益壓縮點輸出功率為23.3 dBm，飽和輸出功率約為
25.9 dBm，最高功率增進效益為29.9 %，晶片面積為1.33 × 1.11 mm2
；應用傳輸
線變壓器功率結合技術之K 頻帶功率放大器增益為10.2 dB，輸入反射損失約為
18.7 dB，輸出反射損失為11.48 dB，1-dB 功率增益壓縮點輸出功率約為22 dBm，
此時的功率增進效益為23.4 %，晶片面積為1.5 × 1 mm2
。

摘要(英)

The study of this thesis is to design different power combiners for power amplifier
application, which can be used to achieve the high transmission efficiency and
impedance transformation. The content of this thesis is divided into two parts. They
are transformer and transmission line transformer (TLT) for power combining
respectively. In the first part, we have designed two power amplifiers with power
combining transformers. They are “A Parallel Power Combining Transformer for
CMOS Power Amplifier” and “Differential Class E Power Amplifier Using Power
Combining Transformer” respectively. The amplifiers were designed and
implemented in tsmcTM 0.18 μm CMOS process for 2.4 GHz application. The first
design is used of two class AB differential pairs, which were combined the output
power from four groups of amplifiers by parallel power combining transformer. And
the second design is used a class E differential pair, which were combined the output
power from the two class E amplifiers by the power combining transformer. The
second part of the thesis is related to the use of TLT for power combining in power
amplifier design. A K-band class AB differential power amplifier with TLT was
implemented in WINTM 0.15 μm pHEMT process.
The measured results of these designs are summarized as follow. The CMOS
power amplifier with parallel power combining transformer achieves a power gain of
19.8 dB, and input and output return losses are 10.2 dB and 5.3 dB respectively. The
output 1-dB gain compression point (P1dB) is 20.9 dBm, and the saturated output
III
power is 26.7 dBm with the maximum power added efficiency of 24.8%. The chip
size is 1.4 × 1.37 mm2. The differential class E power amplifier with power
combining transformer achieves apower gain of 12.98 dB. The output 1-dB gain
compression point (P1dB) is 23.3 dBm, and the saturated output power is 25.9 dBm,
with the maximum power added efficiency of 29.9%. The chip size is 1.33 × 1.11
mm2. The K-band Power Amplifier with TLT power combining network achieves a
power gain of 10.2 dB, and input and output return losses are 18.7 dB and 11.48 dB
respectively. The output 1-dB gain compression point (P1dB) is 22 dBm with the
power added efficiency of 23.4%. The chip size is 1.5 × 1 mm2.

關鍵字(中)

★ 功率放大器
★ 變壓器
★ 功率結合

關鍵字(英)

★ power combining
★ transformers
★ power amplifier

論文目次

摘要................................................................................................................................ I
Abstract .......................................................................................................................... II
誌謝.......................................................................................................................... IV
目錄.......................................................................................................................... VI
圖目錄........................................................................................................................ VIII
表目錄.......................................................................................................................... XII
第一章緒論.................................................................................................................. 1
1-1 研究動機............................................................................................................. 1
1-2 研究成果............................................................................................................. 1
1-3 章節簡介............................................................................................................. 2
第二章功率結合技術.................................................................................................. 3
2-1 功率放大器簡介................................................................................................. 3
2-2 功率結合簡介..................................................................................................... 4
第三章利用功率結合變壓器之CMOS 功率放大器研製 ........................................ 7
3-1 CMOS 功率結合變壓器簡介 ............................................................................. 7
3-2 利用並聯功率結合變壓器之CMOS 功率放大器研製 .................................. 11
3-2.1 並聯功率結合變壓器設計 ........................................................................ 11
3-2.3 利用並聯功率結合變壓器之CMOS 功率放大器模擬量測結果 .......... 16
3-2.4 比較與討論 ................................................................................................ 22
3-3 差動功率結合變壓器之E 類功率放大器研製 ............................................... 24
3-3.1 E 類功率放大器簡介 ................................................................................. 24
3-3.2 功率結合變壓器設計 ................................................................................. 28
3-3.3 差動功率結合變壓器之E 類功率放大器電路設計 ................................ 31
3-3.4 差動功率結合變壓器之E 類功率放大器模擬與量測結果 .................... 34
VII
3-3.5 比較與討論 ................................................................................................. 37
第四章利用功率結合傳輸線變壓器之功率放大器研製........................................ 39
4-1 傳輸線變壓器簡介........................................................................................... 39
4-2 應用傳輸線變壓器功率結合技術之K 頻帶功率放大器研製 ...................... 42
4-2.1 功率結合傳輸線變壓器設計 ..................................................................... 42
4-2.3 應用傳輸線變壓器功率結合技術之K 頻帶功率放大器模擬與量測結果
.............................................................................................................................. 47
4-2.4 比較與討論 ................................................................................................. 52
第五章結論與未來研究方向.................................................................................... 54
5-1 結論................................................................................................................... 54
5-2 未來研究方向................................................................................................... 55
參考文獻...................................................................................................................... 56

參考文獻

[1] I. Aoki, S.D. Kee, D.B. Rutledge, and A. Hajimiri, “Fully integrated CMOS
power amplifier design using the distributed active-transformer architecture,”
IEEE J. Solid-State Circuits, vol. 37, no. 3, pp. 371–383, Mar. 2002.
[2] I. Aoki, S.D. Kee, D.B. Rutledge, and A. Hajimiri, "Distributed active
transformer-a new power-combining and impedance-transformation technique,"
Microwave Theory and Techniques, IEEE Transactions on , vol.50, no.1,
pp.316-331, Jan 2002
[3] P. Reynaert, "A 2.45-GHz 0.13-μm CMOS PA With Parallel Amplification,"
Solid-State Circuits, IEEE Journal of , vol.42, no.3, pp.551-562, March 2007
[4] Y. Yoshihara, R. Fujimoto, N. Ono, and T. Mitomo, H. Hoshino, and M. Hamada,
"A 60-GHz CMOS power amplifier with Marchand balun-based parallel power
combiner," Solid-State Circuits Conference, 2008. A-SSCC '08. IEEE Asian , vol.,
no., pp.121-124, 3-5 Nov. 2008
[5] J.R. Long, "Monolithic transformers for silicon RF IC design," Solid-State
Circuits, IEEE Journal of , vol.35, no.9, pp.1368-1382, Sep 2000
[6] K.H. An, O. Lee, H. Kim; D.H. Lee, J. Han, K.S. Yang, Y. Kim, J.J. Chang, W.
Woo, C.H. Lee, H. Kim, and J. Laskar, "Power-Combining Transformer
Techniques for Fully-Integrated CMOS Power Amplifiers," Solid-State Circuits,
IEEE Journal of , vol.43, no.5, pp.1064-1075, May 2008
[7] D. Chowdhury, C.D. Hull, O.B. Degani, Y. Wang, and A.M. Niknejad, "A Fully
Integrated Dual-Mode Highly Linear 2.4 GHz CMOS Power Amplifier for 4G
WiMax Applications," Solid-State Circuits, IEEE Journal of , vol.44, no.12,
pp.3393-3402, Dec. 2009
57
[8] T. Sowlati, and D.M.W. Leenaerts, "A 2.4-GHz 0.18-μm CMOS self-biased
cascode power amplifier," Solid-State Circuits, IEEE Journal of , vol.38, no.8, pp.
1318- 1324, Aug. 2003
[9] A.V. Grebennikov, and H. Jaeger, "Class E with parallel circuit - a new challenge
for high-efficiency RF and microwave power amplifiers," Microwave Symposium
Digest, 2002 IEEE MTT-S International , vol.3, no., pp.1627-1630, 2002
[10] J. Sevick, “A Simplified Analysis of the Broadband Transmission Line
Transformer,” High Frequency Electronics, vol. 3, Feb. 2004, 48-53.
[11] G. Guanella, “High-Frequency Matching Transformer,” U.S. Patent 2470307,
May 1949.
[12] C. L. Ruthroff, “Some Broad-Band Transformers,” Proc. IRE, vol. 47, Aug.
1959, 1337-1342.
[13] K. Jongchan, A. Hajimiri, and K. Bumman, "A single-chip linear CMOS power
amplifier for 2.4 GHz WLAN," Solid-State Circuits Conference, 2006. ISSCC
2006. Digest of Technical Papers. IEEE International , vol., no., pp.761-769, 6-9
Feb. 2006
[14] P. Haldi, D. Chowdhury, P. Reynaert, L. Gang, and A.M. Niknejad, "A 5.8 GHz 1
V Linear Power Amplifier Using a Novel On-Chip Transformer Power Combiner
in Standard 90 nm CMOS," Solid-State Circuits, IEEE Journal of , vol.43, no.5,
pp.1054-1063, May 2008
[15] L. Gang, P. Haldi, L.K. Tsu-Jae, and A.M. Niknejad, "Fully Integrated CMOS
Power Amplifier With Efficiency Enhancement at Power Back-Off," Solid-State
Circuits, IEEE Journal of , vol.43, no.3, pp.600-609, March 2008
[16] H.Y. Liao, M.W. Pan, and H.K. Chiou, "Fully-integrated CMOS class-E power
amplifier using broadband and low-loss 1:4 transmission-line transformer,"
Electronics Letters , vol.46, no.22, pp.1490-1491, October 28 2010
58
[17] V. Saari, P. Juurakko, J. Ryynanen, and K. Halonen, "Integrated 2.4 GHz class-E
CMOS power amplifier," Radio Frequency integrated Circuits (RFIC)
Symposium, 2005. Digest of Papers. 2005 IEEE , vol., no., pp. 645- 648, 12-14
June 2005
[18] K.H. An, O. Lee, H. Kim, D.H. Lee, J. Han, K.S. Yang, Y. Kim, J.J. Chang, W.
Woo, C.H. Lee, H. Kim, and J. Laskar, "Power-Combining Transformer
Techniques for Fully-Integrated CMOS Power Amplifiers," Solid-State Circuits,
IEEE Journal of , vol.43, no.5, pp.1064-1075, May 2008
[19] A. Bessemoulin, M.G. McCulloch, A. Alexander, D. McCann, S.J. Mahon, and
J.T. Harvey, "Compact K-band Watt-level GaAs PHEMT Power Amplifier
MMIC with integrated ESD protection," Microwave Conference, 2006. 36th
European , vol., no., pp.1743-1746, 10-15 Sept. 2006
[20] A. Bessemoulin, J. Dishong, G. Clark, D. White, P. Quentin, H. Thomas, and D.
Geiger, "1 watt broad Ka-band ultra small high power amplifier MMICs using
0.25-μm GaAs PHEMTs," Gallium Arsenide Integrated Circuit (GaAs IC)
Symposium, 2002. 24th Annual Technical Digest , vol., no., pp. 40- 43, 2002
[21] B. Koo, C. Park; K.A. Lee, J.H. Chun, and S. Hong, "A 28-dBm pHEMT Power
Amplifier Using Voltage Combiner for K-Band Applications," Microwave
Conference, 2008.
[22] B.H. Ku, S.H Baek; and S. Hong, "A Wideband Transformer-Coupled CMOS
Power Amplifier for $X$-Band Multifunction Chips," Microwave Theory and
Techniques, IEEE Transactions on , vol.59, no.6, pp.1599-1609, June 2011
[23] H.K. Chiou, H.Y. Liao, C.C. Chen, and S.M. Wang, “A 2.6-GHz fully integrated
CMOS power amplifier using power combining Transformer”, Microw. Opt.
Technol. Lett., 2010, 52, (2),pp. 299–302
[24] A.M. Niknejad, M. Bohsali, E. Adabi, and B. Heydari, "Integrated circuit
59
transmission-line transformer power combiner for millimetre-wave
applications," Electronics Letters , vol.43, no.5, pp.47-48, March 1 2007
[25] J.X. Liu, C.Y. Hsu, H.R. Chuang, and C.Y. Chen, "A 60-GHz Millimeter-wave
CMOS Marchand Balun," Radio Frequency Integrated Circuits (RFIC)
Symposium, 2007 IEEE , vol., no., pp.445-448, 3-5 June 2007
[26] H. J. Wei, C. Meng, P. Y. Wu, and K. C. Tsung, "K-band CMOS sub-harmonic
resistive mixer with a miniature Marchand balun on lossy silicon
Substrate," Microwave and Wireless Components Letters, IEEE , vol.18, no.1,
pp.40-42, Jan. 2008
[27] Y.N Jen, J.H Tsai, T.W Huang, and H. Wang, "Design and Analysis of a
55–71-GHz Compact and Broadband Distributed Active Transformer Power
Amplifier in 90-nm CMOS Process,"Microwave Theory and Techniques, IEEE
Transactions on , vol.57, no.7, pp.1637-1646, July 2009
[28] C.C Yen, and H.R Chuang, "A 0.25-μm 20-dBm 2.4-GHz CMOS power
amplifier with an integrated diode linearizer," Microwave and Wireless
Components Letters, IEEE , vol.13, no.2, pp. 45- 47, Feb 2003
[29] G. Boeck, "Modeling and design of multilayer transmission line transformers and
baluns," Microwave and Optoelectronics, 2005 SBMO/IEEE MTT-S
International Conference on , vol., no., pp. 230- 232, 25-28 July 2005
[30] J. Sevick, Transmission Line Transformers, Norcross: Noble Publishing, 2001.
[31] C. Park, D.H. Lee, J. Han, and S. Hong; , "Tournament-Shaped Magnetically
Coupled Power-Combiner Architecture for RF CMOS Power
Amplifier," Microwave Theory and Techniques, IEEE Transactions on , vol.55,
no.10, pp.2034-2042, Oct. 2007
[32] O. Degani, F. Cossoy, S. Shahaf, V. Kravtsov, D. Chowdhury, C.D. Hull, C.
Emanuel, and S. Ravid, "A 32dBm power amplifier for WiMAX applications in
60
90nm CMOS," Microwaves, Communications, Antennas and Electronics Systems,
2009. COMCAS 2009. IEEE International Conference on , vol., no., pp.1-5, 9-11
Nov. 2009
[33] P. Reynaert, and A.M. Niknejad, "Power combining techniques for RF and
mm-wave CMOS power amplifiers," Solid State Circuits Conference, 2007.
ESSCIRC 2007. 33rd European , vol., no., pp.272-275, 11-13 Sept. 2007
[34] K.J Kim, T.H. Lim, and K.H Ahn, "The novel high efficiency on chip
transformers for the CMOS power amplifier," Integrated Circuits, ISIC '09.
Proceedings of the 2009 12th International Symposium on , vol., no., pp.401-404,
14-16 Dec. 2009
[35] J. Kim, H. Kim, Y. Yoon, K.H. An, W. Kim, C.H. Lee, K.T. Kornegay, J. Laskar, ,
"A discrete resizing and concurrent power combining structure for linear CMOS
power amplifier," Radio Frequency Integrated Circuits Symposium (RFIC), 2010
IEEE , vol., no., pp.387-390, 23-25 May 2010
[36] K.H An, O. Lee, H. Kim, D.H. Lee, J. Han, K.S. Yang, Y. Kim, J.J Chang, W.
Woo, C.H. Lee, H. Kim, and J. Laskar , "Power-Combining Transformer
Techniques for Fully-Integrated CMOS Power Amplifiers," Solid-State Circuits,
IEEE Journal of , vol.43, no.5, pp.1064-1075, May 2008
[37] H. Gan, “On-chip transformer modeling, characterization, and applications in
power and low noise amplifiers,” Ph.D. dissertation, Dept. Elect. Eng., Stanford
Univ., Stanford, CA, Mar. 2006.
[38] 陳建中,“使用功率結合變壓器功率放大器與反E 類開關式功率放大器研製
”, 中央大學,碩士論文, 2009。
[39] 簡偉仁,“應用於K 頻段之低功耗低相位雜訊壓控振盪器暨Ku 頻段雙模注入
式除頻器之研製”, 中央大學,碩士論文, 2009。
[40] 潘孟偉,“全積體整合矽製程E 類功率放大器與Ka 頻段pHEMT 製程功率放
61
大器研製”, 中央大學,碩士論文, 2010。
[41] 吳開文,“使用變壓器結合功率之功率放大器與反F 類功率放大器研製
”, 中央大學,碩士論文, 2010。

指導教授

邱煥凱(Hwann-Kaeo Chiou)

審核日期

2011-7-27

推文