應用於生醫系統植入式晶片之N-MOSFET低壓降穩壓器(LDO)設計

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柯致專(Chuan-Chih Ke) 查詢紙本館藏

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電機工程學系在職專班

論文名稱

應用於生醫系統植入式晶片之N-MOSFET低壓降穩壓器(LDO)設計
(Design of LDO (Low Drop-out Regulator) using N-channel MOSFET pass-element for Biomedical Implantation application)

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摘要(中)

近年來醫學科學與超大型積體電路的快速發展，使應用在人體內的植入式電子設備趨向於微小化，特別是針對高資料傳輸速率的植入式晶片，如人工視網膜輔具、人工電子耳、多通道微刺激系統等等，採用電感式耦合效應的無線方式來傳輸電源及控制晶片的訊號，可避免如線式傷口感染及電池式電源耗盡情形發生。
因採用電感式耦合效應的無線方式來傳輸電源及資料，因此傳輸電源含有載頻2MHz的交流訊號，經由全波整流器做交-直流轉換後，再利用低壓降線性穩壓器 (Low Drop-out Regulator, LDO) 達成降低電源雜訊影響之功效。
此篇論文採用N-Channel MOSFET做為LDO的傳輸元件(Pass element)且產生輸出10mA負載的3.3V及1.8V的低壓降雙穩壓系統，分別給予電極驅動單元及其他植入式電路。此雙穩壓系統採用TSMC 0.18um Mixed Mode process實現。

摘要(英)

The medical science and VLSI are being developed rapidly in recent years. Application of implantable electronic devices in the human body trends to miniaturization, especially for high data transfer rate of the implanted chip, such as multi-channel micro-stimulation retinal prostheses and cochlear systems. Using wireless way with inductive coupling to transmit the signal of the power supply and control chip can prevent the situation such as the wound infection of wire-type power supply and exhausted of Battery-type power supply.
Owing to the use of inductive coupling of the wireless way to transmit power and data, the power contains the AC signal of carrier frequency of 2MHz. Through the full-wave rectifier, AC - DC converter, and then the low dropout linear regulator (Low Drop-out Regulator, LDO), one can reduce the power supply ripple significantly..
This thesis focuses on the design of dual low-dropout regulators using N-channel MOSFET. It provides regulated 1.8V and 3.3V with output loading of 10mA. The regulators are used for supplying the electrode driver and other implantable circuits. This dual-regulator system was verified in TSMC 0.18-um Mixed-mode process.

關鍵字(中)

★ 生醫系統植入式晶片
★ 低壓降穩壓器

關鍵字(英)

★ Biomedical Implantation application
★ LDO

論文目次

摘要 ..........................................................................................................................................ii
Abstract ..................................................................................................................................iii
致謝 .........................................................................................................................................iv
目錄 ..........................................................................................................................................v
圖目錄 ....................................................................................................................................vii
表目錄 .....................................................................................................................................ix
第一章緒論 ............................................................................................................1
1.1 前言與背景 ................................................................................................................1
1.2 研究動機 ....................................................................................................................1
1.3 系統架構 ....................................................................................................................5
第二章穩壓器基本原理........................................................................................6
2.1 穩壓器種類 ................................................................................................................6
2.1.1 線性穩壓器（Linear Regulator）.....................................................................6
2.1.2 切換式穩壓器（Switching Regulator） ...........................................................6
2.2 線性穩壓器系統設計考量 ........................................................................................8
2.2.1 低壓降穩壓器基本架構 ....................................................................................8
2.2.2 傳輸元件的分類與優缺點 ................................................................................9
2.2.3 低壓降線性穩壓器規格 ..................................................................................12
第三章雙穩壓系統架構......................................................................................16
3.1 雙穩壓架系統構探討 ..............................................................................................16
3.2 參考電壓電路 ..........................................................................................................18
3.3 切換式電容增壓直流轉換電路..............................................................................34
3.4 低壓降線性穩壓器 ..................................................................................................38
第四章總體分析 ..................................................................................................56
4.1 電路整合分析 ..........................................................................................................56
4.2 Physical layout..........................................................................................................58
第五章總結 ..........................................................................................................60
5.1 結論……. .................................................................................................................60
5.2 未來展望 ..................................................................................................................61
參考文獻 ................................................................................................................................62

參考文獻

[1]Robert Jon Milliken, “A Capacitor-less low Drop-out Voltage Regulator with Fast transient response,” Texas A&M University, Master of Science, Dec 2005
[2]陳彤伊“Analysis and Design of an Efficient Front-End Circuitry for Wirelessly-Powered HF-Band Implantable system ” 國立中央大學, 電機工程學系, 碩士論文, 七月. 民國96年
[3]Yamu Hu, Mohamad Sawan and Mourad N. EL-Gamal, “An Integrated Power Recovery Module Dedicate to Implantable Electronic Devices,” Analog Integrated Circuits and Signal Processing, Volume 43, Pages: 171-181, May 2005
[4]Mohammad Mahdi Ahmadi, Graham Jullienm, “A Full CMOS Voltage Regulating Circuit for Bioimplantable Applications,” Circuits and Systems, Volume 2, Pages: 988 – 991, Aug 2005
[5]Pual R. Gray, Pual J. Hurst, Stephen H. Lewis and Robert G. Meyer, “Analysis and Design of Analog Integrated Circuits,” New York, John Wiley & Sons, Inc., 5th Edition, 2010.
[6]Behzad Razavi, “ Design of analog CMOS Integrated Circuits,” McGRAW-HILL, 2001
[7]Chia-Wei Chang, Tien-Yu Lo, Chia-Min Chen, Kuo-His Wu and Chung-Chih Hung, “A Low-Power CMOS Voltage Reference Circuit Base on Subthershold Operation,” Circuits and Systems, Pages: 3844 – 3847, May 2007.
[8]G. Giustolisi, G. Palumbo, M. Criscione, and F. Cutrì, “A Low-Voltage Low-Power voltage reference based on subthreshold MOSFETs,” IEEE Journal of Solid State Circuits, Volume 38, Issue: 1,Pages: 151 – 154, Jan 2003.
[9]M. H. Cheng, and Z.W. Wu, “Low-Power low-voltage reference using peaking current mirror circuit,” Electronics Letters, Volume: 41, Issue: 10, Pages: 572 – 573, May 2005
[10]Hongchin Lin, Dern-Koan Chang, “A Low Voltage Process Corner Insensitive Subthreshold CMOS Voltage Reference Circuit,” Integrated Circuit Design and Technology, Pages: 1-4, 2006
[11]Ka Nang Leung , Mok P.K.T.,“A CMOS Voltage Reference Based on Weighted △VGS For CMOS Low-Dropout Linear Regulators,” Solid-State Circuits, IEEE Journal, Volume 38, Issue: 1,Pages: 146 – 150, Jan 2003
[12]Po-Hsuan Huang, Hong-Chin Lin, Yen-Tai Lin,“A Simple Subthreshold CMOS Voltage Reference Circuit with Channel-Length Modulation Compensation,” Circuits and Systems, Volume 53, Issue:9, Pages: 882 - 885, Sept 2006
[13]Sodagar A.M., Najafi K., “A Wide-Range Supply-Independent CMOS Voltage Reference for Telemetry-Power Application,” Electronics, Circuits and Systems, Volume 1, Pages: 401 - 404, Sept 2002
[14]Starzyk J.A., Ying-Wei Jan, Fengjing Qiu, “A DC–DC Charge Pump Design Based on Voltage Doublers,” Circuits and Systems, Volume: 48, Issue: 3, Pages: 350 – 359, Mar 2001
[15]Favrat P., Deval P., Declercq M.J., “An Improved Voltage Doubler in a Standard CMOS technology,” Circuits and Systems, Volume 1, Pages: 249 – 252, Jun 1997
[16]Daniel Camcho, Ping Gui., Paulo Moreira“Fully on-chip switched capacitor NMOS low dropout voltage,” Analog Integrated Circuit Signal process, Dec. 2009
[17]Camacho, Daniel, Ping Gui, Moreira Paulo, “An NMOS Low Dropout Voltage Regulator with Switched Floating Capacitor Gate Overdrive,” Circuits and Systems, Pages: 808-811, Aug 2009
[18]G. Giutilisi, G. Palumbo, C. Falconi, “NMOS Low Drop-out Regulator with Dynamic Biasing,” Electronics, Circuits and Systems, Pages: 204 - 207, Dec 2002
[19]Salmi K., Scarabello C., Chevalerias O., Rodes F., “4 V, 5 mA low drop-out regulator using series-pass n-channel MOSFET,” Electronics Letters, Volume: 35 , Issue: 15, Pages: 1214 – 1215, Jul 1999
[20]K. N. Leung and P. K. T. Mok, “A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation,” IEEE Journal of Solid-State Circuits, Volume: 38 , Issue: 10, Pages: 1691 - 1702, Oct. 2003
[21]P. Hazucha, T. Karnik, B. Bloechel, C. Parsons, D. Finan, S. Borkar, “Area-efficiency linear regulator with ultra-fast load regulation,” IEEE Journal of Solid-State Circuits, Volume: 40 , Issue: 4, Pages: 933 - 940, April 2005
[22]R.J. Milliken, J. Silva-Martinez, E. Sanchez-Sinencio, “Full On-Chip Low-Dropout Voltage Regulator,” IEEE Transactions On Circuits and System, Volume: 54 , Issue: 9, Pages: 1879 - 1890, Sept. 2007
[23]W. Kruiskamp, R. Beumer, “Low drop-out Voltage Regulator with Full On-chip Capacitance for Slot based operation,” ESSCIRC2008, 34th European Solid State Circuits Conference 2008, Pages: 346 – 349, Sept. 2008
[24]蕭培墉, 吳孟賢, “Hspice 積體電路設計分析與模擬導論,” 初版,東華書局, 台北市,七月,民國九十四年.
[25]Gabriel Alfonso Rincon-Mora, “Analog IC Design with Low-Dropout Regulators,” McGRAW-HILL, 2004
[26]P. Li and R. Bashirullah, “A wireless power interface for rechargeable battery operated medical implants,” IEEE Trans. Circuits Syst. II, Volume: 54 , Issue: 10, Pages 912-916, Oct. 2007
[27]F. Mounaim and M. Sawan, “Integrated high-voltage inductive power and data-recovery front end dedicated to implantable devices,” Biomedical Circuits and Systems, Volume: 5, Issue: 3, Pages: 283 – 291, June 2011.
[28]H. Lee and M. Ghovanloo, “An integrated power-efficient active rectifier with offset-controlled high speed comparators for inductively-powered applications,” Circuits and Systems I: Regular Papers, IEEE Transactions on, Volume: 58, Issue: 8, Pages: 1749 – 1760, Aug. 2011
[29]Q. Huang and M. Oberle, “A 0.5-mW passive telemetry IC for biomedical applications,” IEEE J. Solid-State Circuits, Volume: 33 , Issue: 7, Pages: 937 - 946, Jul 1998
[30]T. Akin, K. Najafi, and R.M. Bradley, “A wireless implantable multichannel digital neural recording system for a micromachined sieve electrode,” IEEE J. Solid-State Circuits, Volume: 33, Issue: 1, Pages: 109 - 118, Jan 1998
[31]B. Smith, Z. Tang, M.W. Johnson, S. Pourmehdi, M.M. Gazdik, J.R. Buckett, and P.H. Peckham, “An externally powered, multichannel, implantable stimulator-telemeter for control of paralyzed muscle,” IEEE Transactions on Biomedical Engineering, Volume: 45, Issue: 4, Pages: 463–475, Apr. 1998.
[32]W. Liu, K. Vichienchom, M. Clements, S.C. DeMarco, C. Hughes, E. McGucken, M.S. Humayun, E. De Juan, J.D. Weiland, and R. Greenberg, “A neuro-stimulus chip with telemetry unit for retinal prosthetic device,” IEEE J. Solid-State Circuits, Volume: 35 , Issue: 10, Pages: 1487–1497, Oct. 2000.

指導教授

薛木添(Muh-Tian Shiue)

審核日期

2012-7-30

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