博碩士論文 985201036 詳細資訊




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姓名 施峰傑(Fong-Jay Shih)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 千兆級位元傳輸多輸入多輸出正交分頻多工系統之實作
(Implementation of a Gigabit 4x4 MIMO-OFDM System)
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摘要(中) 本論文將介紹經由台積電90奈米製程實作,應用於室內高傳輸率無線通訊系統的多輸入多輸出正交分頻多工基頻收發機。接收機支援QPSK、16QAM與64-QAM的星座圖且空間多工達四根天線。此系統有三種操作模式,分別對應到128、256與512三種不同的FFT點數。接收機的部分,整合了同步偵測、通道估測與多輸入多輸出訊號的解碼三個主要功能區塊,使用了24顆大大小小的記憶體,為達到節省硬體,其中有5顆記憶體屬共用記憶體。我們在時域上結合符元邊界時間偵測與小數載波頻率偏移估測模組。接收訊號先進入符元邊界時間偵測與載波頻率偏移估計模組來得到適當的FFT操作區間和最初的載波頻率偏移估測值。訊號被FFT單元轉換到頻域之後,我們也設計了在頻域上的殘餘載波頻率偏移與取樣時間偏移追蹤裝置來補償殘餘載波頻率偏移與時間頻率偏移以避免其嚴重破壞系統的效能。透過長前置序列來進行通道估測動作,緊接著做一次排序的QR分解。如此一來,就可以將前置作業完成的訊號送入最佳K值球型解碼器去得到空間多工的使用者資料。我們也提供達到系統效能的模擬結果,使用TSMC 90nm製程,合成晶片邏輯閘個數為1.034MGE+835kbit,總消耗功率為335mW,後佈局模擬結果得知,系統操作在160MHz的取樣頻率下,可以達到2.592Gbps的傳送速率。
摘要(英) In this thesis, implementation of a MIMO-OFDM baseband receiver by TSMC 90nm process for indoor highthroughput wireless communication systems is presented. The receiver supports QPSK, 16QAM and 64-QAM constellation and spatial multiplexing up to four antennas. The system has three operation modes corresponding to different FFT sizes of 128, 256, and 512 points. At the receiver, three main functional blocks of synchronization, channel estimation and MIMO detection are integrated at the receiver. And 24 memories are used. For reducing hardware complexity, five memories are shared. We incorporate symbol timing detection and carrier frequency offset (CFO) acquisition modules in the time domain. The received signals first enter into the symbol timing detector and CFO estimator to acquire an adequate FFT window and an initial CFO estimate. After the signals are transformed to frequency domain by the FFT unit, the subsequent CFO and sampling clock offset (SCO) tracking mechanism is also designed in the frequency domain to compensate the residual CFO and SCO errors to prevent from their severe destruction of the system performance. The channel estimates are then derived from the long preamble and are subsequently processed by the one-time sorted QR decomposition unit. Thereafter, the pre-processed signals are sent to the K-best sphere decoder to retrieve the spatial multiplexed user data. Simulation results are provided to show the satisfying system performance. The design is implemented in TSMC 90nm CMOS technology. It has gate count of 1.034M and uses memories of 835 Kbits. Total consumption power is 335mW. From post-layout simulation results, the system can work at 160MHz sampling frequency, which is capable to offer 2.592 Gbps transmission rate.
關鍵字(中) ★ 無線區域網路
★ 高產出
★ 基頻接收機
★ 多輸入多輸出正交分頻多工
關鍵字(英) ★ Wireless LAN
★ baseband receiver
★ MIMO-OFDM
★ high throughput
論文目次 第一章 緒論 1
1.1 研究動機 1
1.2 論文組織 2
第二章 系統規格介紹 3
2.1 傳送資料處理 3
2.1.1 傳送端架構 3
2.1.2 系統規格 5
2.2 接收機架構圖 7
2.3 規格比較 7
第三章 通道模擬 9
3.1 2.5GHz與60GHz通道 9
3.2 TSV 模型 11
3.3 模擬環境與模擬結果 18
3.3.1 60GHz通道參數 18
3.3.2 IEEE802.15.3c的通道環境參數表 19
3.3.3 通道模擬流程 24
3.3.4 通道模擬結果 26
第四章 硬體架構 28
4.1 硬體架構 28
4.1.1 同步與小數載波頻率偏移估測與補償 28
4.1.2 快速傅立葉轉換 30
4.1.3 殘餘載波頻率偏移(CFO)與取樣時間偏移追蹤(SCO) 32
4.1.4 通道估測 34
4.1.5 QR分解(QR Decomposition, QRD) 37
4.1.6 K-best球型解碼器 40
4.2 記憶體 43
4.2.1記憶體種類與功用 43
4.2.2 記憶體時序 44
4.2.3 內建自我測試電路(Built-In Self Test,BIST) 46
4.3硬體設計改良與系統效能 51
4.3.1 Delay Buffer共用 51
4.3.2 系統效能 52
第五章 硬體實作 59
5.1 晶片實作流程 59
5.2 Gated Clock處理 64
5.3 量測電路 65
5.5 合成結果 67
5.5.1 佈局平面圖 67
5.5.2 RTL Simulation 74
5.5.3 Gate level pre-layout Simulation 75
5.5.4 Gate level post-layout Simulation 76
5.5.5 LVS驗證結果 77
5.6 硬體實作比較 79
第六章 結論 81
參考資料 82
參考文獻 [1] IEEE P802.11n/D2.00 Draft STANDARD for Wireless LAN Medium Access Control(MAC) and Physical Layer(PHY) Specifications : Enhancements for High Throughput
[2] R. C. Daniels and R. W. Heath, “60 GHz wireless communications: emerging requirements and design recommendations,” IEEE Vehicular Technology Magazine, vol.2, Issue.3, pp.41-50. Sep. 2007.
[3] H. Sawada, NICT, “IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs)” doc. : IEEE 802. 15-06-0297-02-003c
[4] K. Sato, H. Sawada, Y. Shoji, S. Kato, NICT, “Channel Model For Millimeter Wave WPAN,” The 18th Annual IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC”07), Sep. 2007. pp.1-5.
[5] S. K. Yong, Samsung, “TG3c Channel Modeling Sub-committee Final Report,” IEEE 802.15-07-0584-01-003c
[6] H. Shousheng and M. Torkelson, “Designing pipeline FFT processor for OFDM
(de)modulation,” International Symposium on Signals, Systems, and Electronics, Oct. 1998. pp.257 – 262.
[7] P. Y. Tsai and T. D. Chiueh, “A Low-Power Multicarrier-CDMA Downlink Baseband Receiver
for Future Cellular Communication Systems”, IEEE Transactions on Circuits and Systems I: Reqular Papers, pp.2229-2239. Oct. 2007.
[8] Z. Y. Huang and P. Y. Tsai, “High-Throughput QR Decomposition for MIMO Detection in OFDM Systems,” IEEE International Symposium on Circuit and Systems, May 2010. pp.1492-1495.
[9] P. Y. Tsai, W. T. Chen, X. C. Lin, M. Y. Huang, “A 4x4 64-QAM reduced-complexity K-best MIMO detector up to 1.5Gbps,” IEEE International Symposium on Circuit and Systems, 2010. pp.3953-3956.
[10] S. Cook and D. Prasad, “Creating Artisan’s Recommended Memory BIST Hardware with MBISTArchitect,” Mentor Graphics Corporation, Nov. 2004.
[11] A. Burg, and et al., “A 4-Stream 802.11n Baseband Transceiver in 0.13 μm CMOS ,” IEEE Symposium on VLSI Circuits, Jun. 2009. pp. 282-283.
[12] P. Petrus, and et al., “An Integrated Draft 802.11n Compliant MIMO Baseband and MAC Processor,” IEEE Solid-State Circuits Conference, Feb. 2007. pp. 266-602
[13] Ze-Mu Chang, “Design and Evaluation of Gigabit Indoor Wireless Communication Systems,” National Central University master thesis, Jun. 2010.
[14] Zheng-Yu Huang, “High-Throughput QR Decomposition for MIMO Detection in OFDM Systems,” National Central University master thesis, Jun. 2010.
[15] Wen-Ji Jau, “Gigabit Wireless Communication Systems for Next-Generation Digital-Home Applications,” National Central University master thesis, Jun. 2011.
指導教授 蔡佩芸(Pei-Yun Tsai) 審核日期 2012-8-29
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