使用注入鎖定技術之微波及毫米波低相位雜訊訊號源積體電路研製

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：152

、訪客IP：3.128.199.162

姓名

呂承翰(Cheng-han Lu) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

使用注入鎖定技術之微波及毫米波低相位雜訊訊號源積體電路研製
(Design and Analysis of Microwave and Millimeter-Wave Low Phase Noise Signal Source Integrated Circuits using Injection-locked Technique)

相關論文

★ 微波及毫米波切換器及四相位壓控振盪器整合除三除頻器之研製	★ 微波低相位雜訊壓控振盪器之研製
★ 高線性度低功率金氧半場效電晶體射頻混波器應用於無線通訊系統	★ 砷化鎵高速電子遷移率之電晶體微波/毫米波放大器設計
★ 微波及毫米波行進波切換器之研製	★ 寬頻低功耗金氧半場效電晶體射頻環狀電阻性混頻器
★ 微波與毫米波相位陣列收發積體電路之研製	★ 24 GHz汽車防撞雷達收發積體電路之研製
★ 低功耗低相位雜訊差動及四相位單晶微波積體電路壓控振盪器之研究	★ 高功率高效率放大器與振盪器研製
★ 微波與毫米波寬頻主動式降頻器	★ 微波及毫米波注入式除頻器與振盪器暨射頻前端應用
★ 寬頻主動式半循環器與平衡器研製	★ 雙閘極元件模型與微波及毫米波分佈式寬頻放大器之研製
★ 銻化物異質接面場效電晶體之研製及其微波切換器應用	★ 微波毫米波寬頻振盪器與鎖相迴路之研製

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

[檢視]

[下載]

本電子論文使用權限為同意立即開放。
已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。
請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。

摘要(中)

本論文主要討論使用注入鎖定技術之微波及毫米波低相位雜訊訊號源積體電路的研究。首先，提出一個利用調整正負阻比值而達到高輸出功率及高效率的24-GHz功率振盪器，實現於砷化鎵0.15微米假晶高電子遷移率電晶體 (PHEMT) 製程。另外，此電路也可當作一個相位位移器使用。量測最大輸出功率為21.3 dBm而效率最高達41.7%。利用相同的方法，進一步提出一個高效率的U-band功率振盪器，實現於砷化鎵0.1微米假晶高電子遷移率電晶體 (PHEMT) 製程。提出的功率振盪器與最近所發表的功率振盪器互相比較，展現高效率及高功率輸出等優點。
接著，第三章為兩個K頻段全積體化的多相位壓控振盪器，第一個是使用穩懋砷化鎵材質之異質接面雙極性電晶體和假晶高電子遷移率電晶體製程的並聯耦合四相位壓控振盪器，另一個則是使用90奈米金屬氧化半導體製程實現的八相位壓控振盪器，採用串連耦合形式並且使用變壓器回授及電流再利用的架構。此外，本論文中也針對如何直接量測多相位壓控振盪器之振幅及相位誤差作了討論。此二電路的量測結果與先前所發表的多相位壓控振盪器相比，擁有低振幅低相位誤差的優點。
第四章使用延遲鎖定迴路自我對準注入的技術，實現一個次諧波注入鎖定鎖相迴路。藉由此次提出的架構，讓注入訊號與壓控振盪器的輸出相位隨環境變異可以自動的對準，進一步的降低抖動(jitter)以及改善鎖相迴路的中心頻雜訊。在操作頻率為2.3 GHz及偏移中心頻為1 MHz時，量測次諧波注入鎖定鎖相迴路之相位雜訊為-123.1 dBc/Hz，均方根值(rms)抖動為356 fs。
最後，我們總結這篇論文所提出的研究成果於第五章。

摘要(英)

Design and analysis of low phase noise signal source integrated circuits using injection-locked technique is presented in this dissertation. A 24-GHz high output power and high efficiency power oscillator (POSC) is proposed using a 0.15-µm GaAs PHEMT process in Chapter 2. It also can be used as an active injection-locked phase shifter. By tuning the ratio between the input resistance and load resistance, the proposed POSC achieves a maximum output power of 21.3 dBm and a maximum efficiency 32%. Besides, using the same way, a U-band high efficiency POSC using a 0.1-µm GaAs PHEMT process is also presented. These two works demonstrate good figure-of-merit (FOM) among all the reported fully integrated POSCs.
In Chapter 3, two fully integrated K-band multi-phase voltage-controlled oscillators are presented. First one is a parallel-coupled quadrature-phase voltage-controlled oscillator (P-QVCO) using a 0.5-µm BiFET process. The second is an eight-phase VCO with current-reused configuration and transformer-feedback using a standard bulk 90-nm COMS process. Besides, the characterization of the amplitude and phase errors for the multi-phase VCO is successfully demonstrated using the proposed innovative method. As compared with the previously reported state-of-the-art multi-phase VCOs, these works feature low phase and amplitude errors.
A 2.5-GHz SILPLL with delay-locked loop (DLL) self-aligned injection using 65-nm CMOS technology is presented in Chapter 4. With the proposed innovative topology, the phase between the injection signal and the sub-harmonically injection-locked voltage controlled oscillator (SILVCO) in the PLL can be dynamically aligned to minimize the jitter over the variation. The in-band phase noise of the SILPLL can be significantly improved using the SIL technique. As the operation frequency is 2.3 GHz, the measured phase noise of the proposed SILPLL with self-aligned injection is -123.1 dBc/Hz at 1 MHz offset with a rms jitter of 356 fs.
Finally, we summarize the conclusion in Chapter 5.

關鍵字(中)

★ 注入鎖定
★ 低相位雜訊
★ 積體電路

關鍵字(英)

★ Injection-locked
★ Phase noise
★ Integrated circuits

論文目次

摘要 I
Abstract II
Contents V
List of Figures VIII
List of Tables XIV
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Literatures Survey 2
1.3 Contributions 3
1.4 Dissertation Organization 4
Chapter 2 Microwave Power Oscillators 6
2.1 Power Oscillator 6
2.1.1 Introduction 6
2.1.2 Oscillation conditions [40] 6
2.2 A 24-GHz POSC 12
2.2.1 MMIC Process 12
2.2.2 Circuit Design 13
2.2.3 Measurement Results and Discussions 17
2.3 A U-band POSC 24
2.3.1 MMIC Process 24
2.3.2 Circuit Design 25
2.3.3 Measurement Results and Discussions 27
2.4 Summary 31
Chapter 3 Multi-phase Voltage-controlled Oscillators 33
3.1 Multi-phase Voltage-controlled Oscillator 33
3.1.1 Introduction 33
3.1.2 Method of Generation Multi-phase Signals 33
3.1.3 Measurement Method of Amplitude and Phase Errors 38
3.2 A Quadrature-phase Voltage-controlled Oscillator 47
3.2.1 MMIC Process 47
3.2.2 Circuit Design 47
3.2.3 Measurement Results and Discussions 49
3.3 An Eight-phase Voltage-controlled Oscillator 54
3.3.1 MMIC Process 54
3.3.2 Circuit Design 54
3.3.3 Measurement Results and Discussions 56
3.4 Summary 63
Chapter 4 Subharmonically Injection-locked Phase-lock Loop 66
4.1 Phase-lock Loop [84-85] 66
4.1.1 Introduction 66
4.1.2 Building Blocks of PLLs 66
4.1.3 Discussions of Subharmonically Injection-locked PLL 79
4.2 A 2.5-GHz Subharmonically Injection-locked PLL with Self-aligned Injection 82
4.2.1 MMIC Process 82
4.2.2 Circuit Design 84
4.2.3 Measurement Result and Discussions 93
4.3 Re-design of 2.5GHz SILPLL 99
4.4 Summary 106
Chapter 5 108
Reference 110

參考文獻

[1] K.-W. Cheng, H. Wang, G. Shreve, J. Harrison, M. Core, A. Paxton, M.Yu, C. H. Chen, and G. S. Dow, “Forward looking automotive radar using a W-band single-chip transceiver,” IEEE Trans. Microw. Theory Tech., vol. 43, no. 7, pp. 1659-1668, Jul. 1995.
[2] D. A. Williams, “Millimeter wave radars for automotive applications,” 1992 IEEE MTT-S Int. Microwave Symp. Dig., vol. 2, June 1992, pp. 721-724.
[3] A. G. Stove, “Automobile radar,” Appl. Microwave Mag., Spring 1993, pp. 102-115.
[4] E. C. Niehenke, P. Stenger, T. McCormick, and C. Schwerdt, “A planar 94-GHz transceiver with switchable polarization,” in IEEE MTT-S Int. Microwave Symp. Dig., 1993, pp. 167-170.
[5] H. Kondoh, K. Sekine, S. Takatani, K. Takano, H. Kuroda, and R. Dabkowski, “77 GHz fully-MMIC automotive forward-looking radar,” in 1999 GaAs IC Symp. Dig., pp. 211-214.
[6] H. Rohling, M. M. Meinecke, K. Mott, and L. Urs, “Research activities in automotive radar,” Physics and Engineering of Millimeter and Sub-Millimeter Waves, vol. 1, 2001, pp. 48-51.
[7] D. Murphy, Q. J. Gu, Y.-C. Wu, H.-Y. Jian, Z. Xu, A. Tang, F. Wang, and M.-C. F. Chang, “A low phase noise, wideband and compact CMOS PLL for use in a heterodyne 802.15.3c transceiver,” IEEE J. Solid-State Circuits, vol. 39, no. 11, pp. 1606-1617, Jul. 2011.
[8] Y.-A. Li, M.-H. Hung, S.-J. Huang, and J. Lee, “A fully integrated 77 GHz FMCW radar system in 65nm CMOS,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2010, pp. 216-217.
[9] T. Mitomo, N.Ono, H. Hoshino, Y. Yoshihara, O. Watanabe, and I. Seto, “A 77 GHz 90nm CMOS transceiver for FMCW radar applications,” IEEE J. Solid-State Circuits, vol. 45, no. 4, pp. 928-937, Apr. 2010.
[10] B. Razavi, “A study of injection locking and pulling in oscillators,” IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1415-1424, Sept. 2004.
[11] K. Jurokawa, “Injection locking of microwave of solid-state oscillators,” Proc. IEEE, vol. 61, pp. 1336-1385, Oct. 1973.
[12] P.-H. Feng, and S.-I. Liu, “Divide-by-three injection-locked frequency dividers over 200 GHz in 40-nm CMOS,” IEEE J. Solid-State Circuits, vol. 48, no. 2, pp. 405-416, Feb. 2013.
[13] H.-H. Hsieh, H.-S. Chen and L.-H. Lu, “A V-Band Divide-by-4 Direct Injection-Locked Frequency Divider in 0.18-μm COMS,” IEEE trans. Microw. Theory Tech., vol. 59, no. 2, pp. 393-405, Feb. 2011.
[14] M.-W. Li, P.-C. Wang, T.-H. Huang, and H.-R. Chuang, “Low-voltage, wide-locking-range, millimeter-wave divide-by-5 injection-locked frequency dividers,” IEEE trans. Microw. Theory Tech., vol. 60, no. 2, pp. 679-685, Mar. 2012.
[15] E. Monaco, M. Pozzoni, F. Svelto, and A. Mazzanti, “Injection-locked CMOS frequency doublers for μ-wave and mm-wave applications,” IEEE J. Solid-State Circuits, vol. 45, no. 8, pp. 1565-1574, Aug. 2010.
[16] M.-C. Chen and C.-Y. Wu, “Design and analysis of CMOS subharmonic injection-locked frequency triplers,” IEEE trans. Microw. Theory Tech., vol. 56, no. 8, pp. 1869-1878, Aug. 2008.
[17] W. K. Chan and J. R. Long, “A 56-to-65 GHz injection-locked frequency tripler with quadrature outputs in 90-nm CMOS,” IEEE J. Solid-State Circuits, vol. 43, no. 12, pp. 2739-2746, Dec. 2008.
[18] C.-J. Li, C.-H. Hsiao, F.-K. Wang, T.-S. Horng, and K.-C. Peng, “A rigorous analysis of a phase-locked oscillator under injection,” IEEE trans. Microw. Theory Tech., vol. 58, no. 5, pp. 1391-1400, May. 2010.
[19] Y.-C. Huang and S.-I. Liu, “A 2.4 GHz sub-harmonically injection-locked PLL with self-calibrated injection timing,” IEEE J. Solid-State Circuits, vol. 48, no. 2, pp. 417-428, Dec. 2013.
[20] J. Lee, and H. Wang, “Study of subharmonically injection-locked PLLs,” IEEE J. Solid-State Circuits, vol. 44, no. 5, pp. 1539-1553, May 2009.
[21] H. Wang, E. Lin, D. C. W. Lo, R. Lai, L. Tran, J. Cowles, Y. C. Chen, T. Block, P. H. Liu, H. C. Yen, and K. Stamper, “A monolithic 24-GHz frequency source using InP-based HEMT-HBT integration technology,” IEEE Radio Frequency Integrated Circuit Symp., pp. 78-81, June 1997.
[22] K. Ogawa, H. Ikeda, T. Ishizaki, K. Hashimoto, and Y. Ota, “25 GHz dielectric resonator oscillator using an AlGaAs/GaAs HBT,” Electron. Kett., vol. 25, no. 18, pp. 1514-1516, Aug. 1990.
[23] W.-K. Huang, Y.-A. Liu, C.-M. Wang, Y.-M. Hsin, C.-Y. Liu, and T.-J. Yeh, “Flip-chip assembled GaAs pHEMT Ka-band oscillator,” IEEE Microw. and Wireless Compon. Lett., vol. 17, no. 1, pp. 67-69, Jan. 2007.
[24] B. Piernas, K. Nishikawa, T. Nakagawa, and K. Araki, “A compact and low-phase-noise Ka-band pHEMT-based VCO,” IEEE trans. Microw. Theory Tech., vol. 51, no. 3, pp. 778-783, Mar. 2003.
[25] S.-G. Park, J.-H. Kim, S.-W. Kim, K.-S. Seo, W.-B. Kim, and J.-I. Song, “A Ka-band MMIC oscillator utilizing a labyrinthine PBG resonator,” IEEE Microw. and Wireless Compon. Lett., vol. 15, no. 11, pp. 727-729, Nov. 2005.
[26] E. Juntunen, D. Dawn, S. Pinel, and J. Lasker, “A high-efficiency, high-power millimeter-wave oscillator using a feedback class-E power amplifier in 45 nm CMOS,” IEEE Microw. and Wireless Compon. Lett., vol. 21, no. 8, pp. 430-432, Aug. 2011.
[27] C. L. Liu, “Impacts of I/Q imbalance on QPSK-OFDM-QAM detection,” IEEE Trans. Consumer Electron., pp. 984-989, Aug. 1998.
[28] H. Hashemi, X. Guan, A. Komijani, and A. Hajimiri, “A 24-GHz SiGe phase-array receiver-LO phase-shifting approach,” IEEE trans. Microw. Theory Tech., vol. 53, no. 2, pp. 614-626, Feb. 2005.
[29] “Optimization of Quadrature Modulator Performance,” Technical Notes and Articles, RF Micro Devices Inc.
[30] H.-Y. Chang, P.-S.Wu, T.-W. Huang, H. Wang, C. L. Chang, and J. Chern, “Design and analysis of CMOS broad-band compact high-linearity modulators for Gigabit microwave/millimeter-wave application,” IEEE trans. Microw. Theory Tech., pp. 20-30, Feb. 2006.
[31] H.-Y. Chang, Y.-H. Cho, M.-F. Lei, C.-S. Lin, T.-W. Huang, and H. Wang, “A 45-GHz quadrature voltage controlled oscillator with a reflection-type IQ modulator in 0.13-μm CMOS technology,” in IEEE MTT-S Int. Microwave Symp. Dig., June 2006, pp. 739-742.
[32] B. M. Helal, M. Z. Straayer, G.-Y. Wei, and M. H. Perrott, “A highly digital MDLL-based clock multiplier that leverages a self-scrambling time-to-digital converter to achieve subpicosecond jitter performance,” IEEE J. Solid-State Circuits, vol. 43, pp. 855-863, Apr. 2008.
[33] F.-R. Liao and S.-S. Lu, “A programmable edge-combining DLL with a current-splitting charge pump for spur suppression,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 57, pp. 946-950, Dec. 2010.
[34] C. F. Liang and K. J. Hsiao, “An injection-locked ring PLL with self-aligned injection window,” IEEE Int. Solid-State Circuits Conf., Tech. Dig., pp. 90-92, Feb. 2011.
[35] Q. Ma, M. R. Haider, S. Yuan, S. K. Islam, “Power-oscillator based high efficiency inductive power-link for transcutaneous power transmission,” 53rd IEEE Int. Medwest Symp. on Circuits and Systems, pp. 537-540, Aug. 2010.
[36] D. M. Klymyshyn, S. Kumar, and A. Mohammadi, “Direct GMSK modulation with phased-locked power oscillator,” IEEE Trans. Vehicular Tech., pp. 1616-1625, vol. 48, no. 5, Sept. 1999.
[37] T. Liebermann and M. Tiebout, “A low phase noise, differentially tuned, 1.8 GHz power VCO with and ESD-compatible 14 dBm output stage in standard digital CMOS,” in Proc. ESSIRC, pp. 512-515, 2001.
[38] I.D. Avramov, S. R. Gilbert, and R. Ruby, “1.5-GHz voltage controlled oscillator with 3% tuning bandwidth using a two-pole DSBAR filter,” IEEE Trans. Ultrason. Ferroelectr. Freq. Control, vol. 58, no. 5, May 2011.
[39] N. Deltimple, Y. Deval, D. Belot, and E. Kerherve, “Design of class-E power VCO in 65 nm CMOS technology: application to RF transmitter architecture,” IEEE Int. Symp. on Circuits and Systems, pp. 984-987, May 2008.
[40] G. Gonzalez, Microwave Transistor Amplifiers: Analysis and Design, Englewood Cliffs, N. J.: Prentice-Hall, 1984, Chapter 5.
[41] D. M. Pozar, Microwave Engineering, 2nd edition, John Wiley & Sons, Aug. 1997.
[42] K. Kurokawa, J. P. Beccone, N. D. Kenyon “Broadband Negative Resistance Oscillator Circuits,” Microwave Symposium, 1969 G-MTT International, 1969, pp. 281-284.
[43] M. Kazimierczuk, “A new approach to the design of tuned power oscillators,” IEEE Transactions on Circuit and System I, vol. CAS-29, no. 4, pp. 261-267, Apr. 2012.
[44] C. G. Hwang, J. S. Lee, J. H. Kim, N. H. Myung, and J. I. Song, “Simple K-band MMIC VCO utilizing a miniaturized hairpin Resonator and a three-terminal pHEMT varactor with low phase noise and high output power properties,” IEEE Microwave and Wireless Component Letters, vol. 13, no. 6, pp. 229-231, Jun 2003.
[45] F. H. Huang, M. H. Tsai, H. Y Chang, and Y. M. Hsin, “A Dual-gate Subharmonic Injection-Locked Oscillator using 0.5 μm GaAs pHEMT Technology,” in 2010 Asia Pacific Microwave Conference Proceedings, pp. 940-943, Dec 2010.
[46] F. H. Huang, C. K. Lin, and Y. J. Chan, “V-Band GaAs pHEMT Cross-Coupled Sub-Harmonic Oscillator,” IEEE Microwave and Wireless Component Letters, vol. 16, no. 8, pp. 473-475, Aug. 2006.
[47] H. Q. Tserng, and B. Kim, “High-efficiency Q-band GaAs FET Oscillator,” IEEE Electronics Letters, vol. 20, no. 7, pp. 297-298, Mar. 1984.
[48] D. Axelrad, E. de Foucauld, M. Boasis, P. Martin, P. Vincent, M. Belleville, and F. Gaffiot, “A multi-phase 10 GHz QVCO in CMOS/SOI for 40 Gbits/s SONET OC-768 clock and data recovery circuit,” in IEEE Radio Frequency Integrated Circuit Symp Dig., pp. 573-576, June 2005.
[49] F. Behbahani, Y. Kishigami, J. Leete, and A. A. Abidi, “CMOS mixers and polyphase filters for large image rejection,” IEEE J. Solid-State Circuits, vol. 36, no. 6, pp. 873-887, Jun. 2001.
[50] M. S. J. Steyaert, J. Janssens, B. De Muer, M. Borremans, and N. Itoh, “A 2-V CMOS cellular transceiver front-end,” IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1895-1907, Dec. 2000.
[51] M. Chua, and K. W. Martin, “1 GHz programmable analog phase shifter for adaptive antennas,” in Proc. IEEE Custom Integrated Circuit Conf., pp. 11-14, May 1998.
[52] C.-A. Lin, J.-L. Kuo, K.-Y. Lin, and H. Wang, “A 24 GHz low power VCO with transformer feedback,” in IEEE RFIC Symp. Dig., pp. 75-78, Jun. 2009.
[53] C.-C. Li, T.-P. Wang, C.-C. Kuo, M.-C. Chuang, and H. Wang, “A 21 GHz complementary transformer coupled CMOS VCO,” IEEE Microwave and Wireless Component Letters, vol. 18, no. 4, pp. 278-280, Apr. 2008.
[54] C.-K. Hsieh, K.-Y. Kao, J. R. Tseng, and K.-Y. Lin, “A K-band CMOS low power modified Colpitts VCO using transformer feedback,” in IEEE MTT-S Int. Microw. Symp. Dig., pp. 1293-1296, Jun. 2009.
[55] Y.-H. Kuo, J.-H. Tsai, and T.-W. Huang, “A 1.7-mW, 16.8% frequency tuning, 24-GHz transformer-based LC-VCO using 0.18-μm CMOS technology,” in IEEE RFIC Symp. Dig., pp. 79-82, Jun. 2009.
[56] T.-H. Huang, and Y.-R. Tseng, “A 1 V 2.2 mW 7 GHz CMOS quadrature VCO using current-reuse and cross-coupled transformer-feedback technology,” IEEE Microw. and Wireless Compon. Lett., vol. 18, no. 10, pp. 698-700, Oct. 2008.
[57] D. Baek, T. Song, E. Yoon, and S. Hong, “8-GHz CMOS quadrature VCO using transformer-based LC tank,” IEEE Microw. and Wireless Compon. Lett., vol. 13, no. 10, pp. 446-448, Oct. 2003.
[58] S. Ko, J.-G. Kim, T. Song, E. Yoon, and S. Hong, “20 GHz integrated CMOS frequency sources with a quadrature VCO using transformers,” in IEEE RFIC Symp. Dig., pp. 269-272, Jun. 2004.
[59] J. J. Kim, and B. Kim, “A low-phase-noise CMOS LC oscillator with a ring structure,” in IEEE Int. Solid-State Circuit Conf. Tech. Dig., pp. 430-431, Feb. 2005.
[60] M. Hossain and A. Chan Carusone, “20 GHz low power QVCO and de-skew techniques in 0.13-μm digital CMOS,” in IEEE Custom Integrated Circuits Conf., pp. 447-450, Feb. 2008.
[61] S. Hackl, J. Bock, G. Ritzberger, M. Wurzer, and A. L. Scholtz, “A 28-GHz monolithic integrated quadrature oscillator in SiGe Bipolar Technology,” IEEE J. Solid-State Circuits, vol. 38, no. 1, pp. 135-137, Jan. 2003.
[62] W. L. Chan, H. Veenstra, and J. R. Long, “A 32 GHz quadrature LC-VCO in 0.25μm SiGe BiCMOS technology,” in 2005 Int. Solid-State Circuit Conf. Dig., San Francisco, USA, pp. 538-539.
[63] C.-H. Lin and H.-Y. Chang, “A low phase noise low DC power quadrature voltage-controlled oscillator using a 0.18-μm CMOS process,” in Proc. EuMIC, pp. 28-29, Sept. 2009.
[64] C.-L. Yang and T.-C. Chiang, “Low phase-noise low-power CMOS VCO constructed in current-reused configuration,” IEEE Microw. and Wireless Compon. Lett., vol. 18, no. 2, pp. 136-138, Feb. 2008.
[65] H.-Y. Chang, and Y.-T. Chiu, “K-band CMOS differential and quadrature voltage-controlled oscillators for low phase-noise and low-power applications,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 1, pp. 46-59, Jan. 2012.
[66] S.-Y. Lee, and C.-Y. Chen, “Analysis and design of a wide-tuning-range VCO with quadrature outputs,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 55, no. 12, pp. 1209-1213, Dec. 2008.
[67] Y.-T. Chiu, Research on Low Power Low Phase Noise Differential and Quadrature Monolithic Microwave Integrated Circuit VCOs, M.S. Thesis, Graduate Institute of Electrical Engineer, National Central University, 2011.
[68] A. Rofougaran, J. Rael, M. Rofougaran, and A. Abidi, “A 900 MHz CMOS LC-oscillator with quadrature outputs,” in 1996 Int. Solid-State Circuit Conf. Dig., San Francisco, USA, pp. 392-393.
[69] W. Z. Chen, C. L. Kuo, and C. C. Liu, “10 GHz quadrature-phase voltage controlled oscillator and prescalar,” IEEE 29th European Solid-State Circuits Conf., pp. 361-364, Sept.2003.
[70] P. Andreani, “A 2 GHz, 17% tuning range quadrature CMOS VCO with high figure-of-merit and 0.6° phase error,” in Proc. IEEE Eur. Solid-State Circuits Conf., pp. 815-818, Sept.2002.
[71] F. Ellinger and H. Jackel, “38-43 GHz quadrature VCO on 90 nm VLSI COMS with feedback frequency tuning,” in IEEE MTT-S Int. Microw. Symp. Dig., pp. 1701-1703, Jun. 2005.
[72] Y.-C. Chang, Y.-C. Chiu, S.-G. Lin, Y.-Z. Juang, and H.-K. Chiou, “High phase accuracy on-wafer measurement for quadrature voltage-controlled oscillator,” in Proc. EuMC, pp. 340-343, Oct. 2007.
[73] K. C. Kwok, and H. C. Luong, “Ultra-low-voltage high-performance CMOS VCOs using transformer feedback,” IEEE J. Solid-State Circuits, vol. 40, no. 3, pp. 652-660, Mar. 2005.
[74] K. L. R. Mertens, and M. S. J. Steyaert, “A 700-MHz 1-W fully differential CMOS class-E power amplifier,” IEEE J. Solid-State Circuits, vol. 37, no. 2, pp. 137-141, Feb. 2002.
[75] C. Y. Kim, J. Yang, D. W. Kim, and S. Hong, “A K-Band Quadrature VCO Based on Asymmetric Coupled Transmission Lines,” in IEEE MTT-S Int. Microw. Symp. Dig., pp. 363-366, Jun. 2008.
[76] R. M. Kodkani, and L. E. Larson, “A 25 GHz Quadrature Voltage Controlled Ring Oscillator in 0.12μm SiGe HBT,” in Silicon Monolithic Integrated Circuits in RF Systems, 2006. Dig. of Papers, Jan. 2006.
[77] M. Tormanen, and H. Sjoland, “A 26-GHz LC-QVCO in 0.13-pum CMOS,” in 2007 Asia Pacific Microwave Conference Proceedings, pp. 1-4, Dec 2007.
[78] F. Herzel and W. Winkler, “A 2.5-GHz eight-phase VCO in SiGe BiCMOS technology,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 52, pp. 140-144, 2005.
[79] L.-C. Cho, C. Lee, and S.-I. Liu, “A 1.2-V 37–38.5-GHz eight-phase clock generator in 0.13-μm CMOS technology”, IEEE Journal of Solid-State Circuits, vol. 42, no. 6, June 2007.
[80] C.-H. Lin, and H.-Y. Chang, “An eight-phase voltage controlled oscillator with reflection-type modulators in 0.18-μm CMOS technology,” in 2008 IEEE MTT-S International Microwave Symposium Digest, Atlanta, Georgia, pp. 1465-1468, June 2008.
[81] Y.-T. Liao, and C.-J. Richard Shi, “A 6-11GHz multi-phase VCO design with active inductors,” International Symposium on Circuits and Systems (ISCAS 2008), pp. 18-21, May 2008.
[82] S.-L. Jang, C.-P. Liu, C.-F. Lee, and C.-W. Hsue, “Quadrature and eight-phase VCOs implemented with SiGe injection locked frequency dividers,” Microwave and Optical Technology Letters, vol. 51, no. 2, Feb. 2009.
[83] S.-L. Jang, C.-C. Liu, M.-H. Suchen, and S.-H. Huang, “An eight-phase CMOS voltage controlled oscillator,” Microwave and Optical Technology Letters, vol. 51, no. 5, May. 2009.
[84] C. Quemada, G. Bistue´, and I. Adin, Design Methodology for RF CMOS Phase Locked Loops, Artech House, 2009.
[85] 劉深淵，楊清淵，鎖相迴路，2011.
[86] R. C. H. v. d. Beek, C. S. Vaucher, D. M. W. Leenaerts, E. A. M. Klumperink, and B. Nauta, “A 2.5-10-GHz clock multiplier unit with 0.22-ps RMS jitter in standard 0.18-μm CMOS”, IEEE Journal of Solid-State Circuits, vol. 39, no. 11, pp. 1862-1872, Nov 2004.
[87] Z. Xu, Q. J. Gu, Y.-C. Wu, H.-Y. Jian and M.-C. F. Chang, “A70-78 integrated CMOS frequency synthesizer foe W-band satellite communications,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 12, pp. 3206-3218, Dec. 2011.
[88] Y. L. Yeh, Research on CMOS Injection-Locked Oscillators for Microwave and Millimeter-Wave Phase-Locked Loop, P.h.D. Thesis, Graduate Institute of Electrical Engineer, National Central University, 2013.
[89] C. F. Liang, and K. J. Hsiao, “An injection-locked ring PLL with self-aligned injection window,” in Int. Solid-State Circuit Conf. Dig. Tech. Papers, pp. 90-92, Feb. 2011.
[90] B. M. Helal, C. M. Hsu, K. Johnson, and M. H. Perrott, “A low jitter programmable clock multiplier based on a pulse injection-locked oscillator with a highly digital tuning loop”, IEEE Journal of Solid-State Circuits, vol. 44, no. 5, pp. 1391-1400, May 2009.
[91] X. Gao, E. A. M. Klumperink, M. Bohsali, and B. Nauta, “A 2.2 GHz 7.6 mW sub-sampling PLL with -126 dBc/Hz in-band phase noise and 0.15 psrms jitter in 0.18 μm CMOS,” in Int. Solid-State Circuit Conf. Dig. Tech. Papers, pp. 392-393, Feb. 2009.
[92] T. A. Ali, A. A. Hafez, R. Frost, R. Ho, and C.-K. K. Yang, “A 4.6 GHz MDLL with -46 dBc reference spur and aperture position tuning,” in Int. Solid-State Circuit Conf. Dig. Tech. Papers, pp. 466-468, Feb. 2011.
[93] R. Farjad-rad, W. Dally, H. Mg, J. Poulton, T. Stone, R. Rathi, E. Lee, D. Huang, and R. Nathan, “A 0.2-2 GHz 12 mW multiplying DLL for low-jitter clock synthesis in highly-integrated data communication chips,” in Int. Solid-State Circuit Conf. Dig. Tech. Papers, pp. 56-57, Feb. 2002.
[94] H. Kondoh et al, “A 1.5-V 250-MHz to 3.0-V 622-MHz operation CMOS phase-locked loop with precharge type phase-frequency dector,” IEICE Trans. Electron, vol. E78-C, no. 4, pp. 381-388, Apr. 1995.
[95] X. Gao, E. A. M. Klumperink, P. F. J. Geraedts, and B. Nauta, “Jitter analysis and a benchmarking figure-of-merit for phase-locked loops,” IEEE Transactions on Circuit and System II, Exp. Briefs, vol. 56, no. 2, pp. 117-121, Feb. 2009.
[96] X. Gao, E. A. M. Klumperink, G. Socci, M. Bohsali, and B. Nauta, “A 2.2 GHz sub-sampling PLL with 0.16 psrms jitter and -125 dBc/ Gz in-band phase noise at 700 μW loop-components power,” in Symp. VLSI Circuits Dig. Tech. Papers, pp. 139-140, Jun. 2010.
[97] W. J. Hwang, S. W. Shin, G. W. Choi, H. J. Kim, and J. J. Choi, “High efficiency power oscillator using harmonic tuned matching network,” IEEE MTT-S International Microwave Symposium Digest, June 2009, pp. 1505-1508.
[98] X. Zhang and A. S. Daryoush, “Full 360˚ Phase Shifting of Injection-Locked Oscillators,” IEEE Microwave and Guided Wave Letters, vol. 3, No. , pp. 14-15, Jan. 1993.

指導教授

張鴻埜

審核日期

2013-8-26

推文