博碩士論文 100553015 完整後設資料紀錄

DC 欄位	值	語言
DC.contributor	通訊工程學系在職專班	zh_TW
DC.creator	邱崇享	zh_TW
DC.creator	Chung-Hsiang Chiu	en_US
dc.date.accessioned	2014-8-13T07:39:07Z
dc.date.available	2014-8-13T07:39:07Z
dc.date.issued	2014
dc.identifier.uri	http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=100553015
dc.contributor.department	通訊工程學系在職專班	zh_TW
DC.description	國立中央大學	zh_TW
DC.description	National Central University	en_US
dc.description.abstract	電力線通訊主要是透過電力線載波的方式進行資料傳輸，所以可利用 現有的電力線路，可節省佈線上的花費。 在本篇論文中，設計並且以Digital signal processing（dsp）實現了在電 力線上通訊的軟體定義OFDM發射機與接收機。此平台由C6416 DSP Starter Kit（DSK）搭配FPGA 板、以及電力線類比前級組合而成。在發射機之訊 號處理模組中設計高速迴旋碼編碼、訊號交錯、星座圖映射、反快速傅立 葉轉換、循環字首置入和前導符碼置入等，而在接收機設計了訊號同步 器、快速傅立葉轉換、通道估測、通道等化、硬式決策、訊號解交錯及通 道解碼等。傳送之訊號頻段範圍1.91MHz 16.66MHz。	zh_TW
dc.description.abstract	Power Line Communications (PLC) has attracted much attention due to the wide availability of power distribution lines. PLC can transmit signal over the existing AC electrical wiring without building whole new network. In this thesis,we design and implement a software dened OFDM transceiver over powerline on the dsp development platform. In this platform, we use C6416 DSP Starter Kit （dsk）、FPGA and PLC Analogy-Front-End (AFE). The transmitter includes high-rate convolutional encoder, signal interleaver, constellation mapper,Invers FFT, cyclic prex inserter and preamble inserter. The receiver includes signal synchronizer, FFT, channel estimator, channel equalizer, hard decider, signal de-interleaver and channel decoder etc. Transmission bandwidth between 1:91MHz and 16:66MHz.	en_US
DC.subject	電力線通訊	zh_TW
DC.subject	正交分頻多工	zh_TW
DC.subject	Power Line Communications	en_US
DC.subject	OFDM	en_US
DC.title	以DSP實現電力線通訊傳收器	zh_TW
dc.language.iso	zh-TW	zh-TW
DC.title	DSP Implementation of a Transceiver for Power Line Communications	en_US
DC.type	博碩士論文	zh_TW
DC.type	thesis	en_US
DC.publisher	National Central University	en_US