博碩士論文 101521015 完整後設資料紀錄

DC 欄位 語言
DC.contributor電機工程學系zh_TW
DC.creator施玟旭zh_TW
DC.creatorWen-hsu Shihen_US
dc.date.accessioned2014-6-30T07:39:07Z
dc.date.available2014-6-30T07:39:07Z
dc.date.issued2014
dc.identifier.urihttp://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=101521015
dc.contributor.department電機工程學系zh_TW
DC.description國立中央大學zh_TW
DC.descriptionNational Central Universityen_US
dc.description.abstract本篇論文中,我們將探討如何利用三維元件模擬器進行環繞式閘極電晶體的元件性模擬。利用環繞式閘極本身的特性,做四分之一等效切割,在不影響元件本身特性下進行模擬且大幅提升模擬速度。接著透過這樣的模擬方式,我們改變環繞式閘極電晶體其通道面積,分析通道內形成部分空乏及完全空乏之現象,討論這樣的現象對環繞式閘極之臨限電壓影響。最後分析環繞式閘極應用於無接面通道與傳統通道之特性比較,介紹兩種通道的操作原理,進而分析兩種通道如何選用Poly-Gate,最後改變各參數觀察對兩種通道的影響程度。zh_TW
dc.description.abstractIn this thesis, we use the three-dimensional device simulation to simulate the gate-all-around MOSFET device characteristics. Using the gate-all-around MOSFET characteristics, we cut the full device into one fourth device to speed up the simulation. Then ,we study the dependance of threshold voltage on the substrate thickness in the gate-all-around MOSFET. At last , we analyze characteristics of the junctionless MOSFET and conventional MOSFET. The basic operating principles of the two MOSFETs will be compared. We discuss how to choose poly-gate type on these two MOSFETs. Finally, we change the parameters to study the impact to these two MOSFETs.en_US
DC.subject環繞式閘極zh_TW
DC.subject環繞式閘極電晶體zh_TW
DC.subjectGAAen_US
DC.subjectGate-All-Around MOSFETen_US
DC.title三維空間環繞式閘極電晶體之模擬級分析zh_TW
dc.language.isozh-TWzh-TW
DC.titleAnalysis and simulation of 3-D Gate-All-Around Transistoren_US
DC.type博碩士論文zh_TW
DC.typethesisen_US
DC.publisherNational Central Universityen_US

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