博碩士論文 101522085 完整後設資料紀錄

DC 欄位 語言
DC.contributor資訊工程學系zh_TW
DC.creator陳泓霖zh_TW
DC.creatorHung-lin Chenen_US
dc.date.accessioned2014-7-11T07:39:07Z
dc.date.available2014-7-11T07:39:07Z
dc.date.issued2014
dc.identifier.urihttp://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=101522085
dc.contributor.department資訊工程學系zh_TW
DC.description國立中央大學zh_TW
DC.descriptionNational Central Universityen_US
dc.description.abstract在現今機器視覺系統多以SoC嵌入式軟硬體整合方法設計,使用FPGA取代多個DSP模組。在傳統的開發中,通常依據需求先設計軟體雛型,接著再將某些模組硬體化,達成軟硬體共同設計之系統。硬體模組多以連續串流進行設計,然而這種方法較缺乏彈性,當需求只要小小改變時,整個硬體模組可能就不適用需要重新規劃。 本論文提出嵌入式視覺軟硬體設計方法論,以IDEF0進行系統分析,將需求階層式模組化切割為多個子模組,再以Grafcet建立各個子模組的離散事件模型,透過快速對應產生軟體語言及硬體語言,此方法論的優點是開發者在系統開發前期不需撰寫程式。另外本論文提出硬體介面控制器,針對軟硬體共同設計之平台,在開發者針對不同目標需求(效能、彈性、成本、耗電)選用硬體模組時,不必重新規劃硬體模組間的設計,只需要透過軟體控制即可規劃硬體模組執行之順序,增加硬體模組之開發彈性,加快系統開發流程。 zh_TW
dc.description.abstractIn recent years, most of the machine vision systems use embedded hardware and software co-design, which uses FPGA to replace some DSP modules. In traditional development, we first design software prototype and then choose some modules that designed by hardware. We use a series designed to connect this hardware modules to compose hardware architecture. However, this type of architecture lacks flexibility. If system requirements just need to do a little change, the architecture need to whole redesign. In this thesis, we propose embedded vision hardware and software co-design methodology. Firstly, we analyze the system requirements with IDEF0. This way is analysis whole system hierarchically and divided into many modules. Secondly, we use Grafcet establish discrete event model for every modules. Then we through the way of Grafcet synthesis to produce software code and hardware design. This development approach needs not coding in prophase of system design. Additionally, we design a hardware interface controller, which is suitable in hardware and software co-design architecture. This controller contains all of hardware modules, and designers can select desired target modules according to system requirements which include efficacy, elasticity, cost, and power consumption. It is not necessary to redesign hardware architecture, the designer just to change the order of hardware modules through software. The hardware interface controller can increased development flexibility, and accelerate the system development process. en_US
DC.subject軟硬體共同設計zh_TW
DC.title物件偵測嵌入式硬體加速器設計與實作zh_TW
dc.language.isozh-TWzh-TW
DC.titleDesign and Implementation of Hardware Accelerator for Embedded Object Detectionen_US
DC.type博碩士論文zh_TW
DC.typethesisen_US
DC.publisherNational Central Universityen_US

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