| DC 欄位 |
值 |
語言 |
| DC.contributor | 電機工程學系 | zh_TW |
| DC.creator | 林慶和 | zh_TW |
| DC.creator | Ching-Ho Lin | en_US |
| dc.date.accessioned | 2016-10-11T07:39:07Z | |
| dc.date.available | 2016-10-11T07:39:07Z | |
| dc.date.issued | 2016 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=103521006 | |
| dc.contributor.department | 電機工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 建立每個電路的行為模型是一種驗證混合信號系統層級的有效方法，如果能發展一個自動行為產生器，可以從電路規格或連線關係自動產生此模塊所需的行為模型，就能有效地協助設計者減少額外工作時間。因此，本論文中提出一個自動化的方法來建立所需的行為模型，以加快混合信號系統的驗證。
對於一些常用的電路模塊，我們採用專用行為模型產生器，直接從給定的電路規格產生相對應的行為模型。對於其他的電路塊則採用分而治之的辦法，從給定的電路中萃取所需的行為模型。在本論文提出的方法中，我們並不會直接模擬電路的輸入和輸出之間的關係，而是將大電路模塊劃分成幾個小的模塊，可以大大的降低不同的電路的模型建設時間，卻又不失一般性。如實驗結果所示，所提出的自動模型產生器確實可以自動生成對應的行為模型，並具備相當良好的精確度。 | zh_TW |
| dc.description.abstract | Building the behavioral model for each circuit is an efficient approach for mixed-signal system verification. If an automatic model generator is available to generate the required behavioral model from the given circuit specifications or netlist, it is useful for designers to reduce the extra efforts. In this paper, a automation methodologies are proposed to build the behavioral models for speeding up mixed-signal system verification.
For some popular circuit blocks, dedicated behavioral model generators are developed to obtain the corresponding models directly from the given specifications. For generic circuit blocks, a divide and conquer approach is proposed to extract the required behavioral models from the given circuit netlist. Instead of modeling the relationship between circuit inputs and outputs directly, dividing the circuit into several small building blocks can greatly reduce the model construction efforts without losing the generality for different circuits. As shown in the experimental results, the proposed model generation environment does generate the corresponding behavioral models automatically with good accuracy. | en_US |
| DC.subject | 類比電路 | zh_TW |
| DC.subject | 行為模型產生器 | zh_TW |
| DC.subject | 建模技術 | zh_TW |
| DC.subject | analog circuit | en_US |
| DC.subject | behavioral model generator | en_US |
| DC.subject | modeling | en_US |
| DC.title | 適用於類比電路區塊之解析式行為模型產生器及數位化建模技術 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | Analytical Behavioral Model Generator for Analog Circuit Blocks with Digitalized Modeling Technique | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |