| DC 欄位 |
值 |
語言 |
| DC.contributor | 電機工程學系 | zh_TW |
| DC.creator | 許哲綮 | zh_TW |
| DC.creator | Che-Ching Hsu | en_US |
| dc.date.accessioned | 2017-7-26T07:39:07Z | |
| dc.date.available | 2017-7-26T07:39:07Z | |
| dc.date.issued | 2017 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=104521071 | |
| dc.contributor.department | 電機工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 本論文探討p型氮化鎵作為氮化鋁鎵/氮化鎵高電子遷移率電晶體之表層 (cap)，並搭配沉積氧化鋁 (Al2O3) 作為閘極介電層來製作成金絕半高電子遷移率電晶體 (MIS-HEMTs) 之研究；論文中也針對不同氮化鎵表層厚度研究元件特性的差異。
利用霍爾量測 (Hall measurement) 及光激發致螢光頻譜 (Photo-Luminescence, PL) 量測進行分析所使用的兩個不同氮化鎵表層厚度之磊晶片，而氮化鎵表層厚度的差異對於元件造成的影響則利用直流和脈衝 (pulse) 電壓/電流量測進行探討。
氮化鎵表層較厚的元件相對呈現較佳的抑制閘極漏電流能力，因而有較好的電晶體之電流開關比，可高達109。針對與表面狀態有緊密相關的閘極漏電流，會分析電流形成的機制，並觀察不同厚度p型氮化鎵表層對於閘極漏電流的影響。元件的崩潰電壓特性，不同厚度氮化鎵表層元件皆可達700伏特。而在脈衝電壓/電流特性上，當為施加或給相對於小的靜止點偏壓條件 (quiescent point) 時，氮化鎵表層較厚之元件較能減緩電流崩塌 (current collapse) 的現象。
而對於不同厚度的p型氮化鎵表層對氧化鋁的介電層/半導體介面，將量測直流/脈衝的臨界電壓飄移現象，並透過對金絕半結構之電容進行電容-電壓量測萃取介面缺陷密度 (Dit) 且量測電容的暫態電流以分析缺陷捕捉機制。量測結果指出較厚氮化鎵表層元件具有較佳的表面狀態外，製作成元件後也具有較好的介電層/半導體介面品質。
以p型氮化鎵作為表層並搭配氧化鋁閘極介電層的金絕半高電子遷移率電晶體，量測結果顯示了相當不錯的元件特性，對於在電源切換應用上之空乏型 (D-mode) 元件中具有相當高的潛力。 | zh_TW |
| dc.description.abstract |
In this study, the use of p-GaN as a cap layer and ALD-Al2O3 as a gate dielectric in AlGaN/GaN MIS-HEMTs have been demonstrated, and the difference in device DC performances when varying cap thickness are presented.
Before device fabrication, Hall measurement and PL measurement were implemented to analyze two epitaxy structures in this study. The influence of p-GaN cap thickness on device performances was discussed through DC and pulse measurement.
Device with thicker p-GaN cap layer shows a lower gate leakage, and therefore could achieve a higher on/off current ratio of ~109. The gate leakage from varying p-GaN cap thickness was investigated to analyze the conduction mechanisms and correlation between gate leakage and surface state conditions. The breakdown characteristics indicate devices with different cap thickness have almost the same breakdown voltages at about 700 V. For pulse I/V characteristics, device with thicker p-GaN cap shows less current collapse phenomenon when biasing at low quiescent bias point.
The Al2O3/p-GaN interface has been analyzed through DC/pulsed measurement of the threshold voltage shift. In addition, Dit was extracted from C-V measurement, and gate-current transient from MIS capacitors was used to study the trapping mechanism near the interface. The measurement result indicates device with thicker p-GaN cap layer have not only better surface state conditions but also better property of Al2O3/p-GaN interface.
AlGaN/GaN MIS-HEMTs with p-GaN cap layer and Al2O3 gate dielectric have been fabricated and characterized. The measurement results show high potential for GaN based devices in power switching applications. | en_US |
| DC.subject | p型氮化鎵表層 | zh_TW |
| DC.subject | 金絕半高電子遷移率電晶體 | zh_TW |
| DC.subject | p-GaN cap | en_US |
| DC.subject | MIS-HEMTs | en_US |
| DC.title | 具p型氮化鎵表層之 金絕半高電子遷移率電晶體 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | The investigation of AlGaN/GaN MIS-HEMTs with a p-GaN cap layer | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |