博碩士論文 105521113 完整後設資料紀錄

DC 欄位 語言
DC.contributor電機工程學系zh_TW
DC.creator黃昱凱zh_TW
DC.creatorYu-Kai Huangen_US
dc.date.accessioned2019-3-29T07:39:07Z
dc.date.available2019-3-29T07:39:07Z
dc.date.issued2019
dc.identifier.urihttp://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=105521113
dc.contributor.department電機工程學系zh_TW
DC.description國立中央大學zh_TW
DC.descriptionNational Central Universityen_US
dc.description.abstract當晶圓發生問題時可以分成隨機性或系統性的兩種錯誤,本篇論文針對過去提出之迴力棒特徵圖來分類實際晶圓(WM-811K)發生問題時是由上述的哪一種錯誤產生所使用的演算法進行加速。 隨著科技的進步,晶圓大小以及產出也日益增加,因此我們的模擬也必須因應晶圓尺寸和數量的增加作出相對應的結果。這樣的情形造成在建構迴力棒特徵圖時必須模擬更多種類的隨機瑕疵,當隨機瑕疵種類以及晶圓尺寸大小同時增加,會使得先前演算法的模擬時間呈非線性遞增,本論文希望藉由新的演算法加速程式運行速度,且改掉模擬時間越來越長的問題。 新的演算法不僅加速建構迴力棒特徵圖,也能加速分類實際晶圓(WM-811K)的模擬,使得在模擬尺寸較大或是數量較多的晶圓時可以更快速的得到結果,並且不會受到模擬環境的限制、如w48099加速倍率可達1423倍,WM-811K模擬時間只需300秒即可完成模擬。zh_TW
dc.description.abstractWhen a problem occurring on a wafer, it can be divided into two kinds of errors, random or systematic. In this study, we use previously proposed boomerang chart to classify the problem of real wafer (WM-811K). However, with the advancement of technology, wafer size and quantity are also increasing. Therefore, our simulation must also re-create corresponding results in response to increasing size and quantity of wafer. This situation results in the need to simulate more kinds of random defects when constructing the boomerang chart. When the random defects and the size of the wafer increase at the same time, the simulation time of the previous algorithm will increase nonlinearly. In this study, we hope to use new algorithm to solve the previous problem. This method not only speeds up the construction of the boomerang chart and the classification of the real wafer (WM-811K), making it possible to simulate bigger or larger numbers of wafers. The results can be obtained more quickly and will not be limited by the simulation environment. BA-19 can speed up 1423x on w48099,and it only cost 300 seconds to finish simulation.en_US
DC.subject迴力棒特徵圖zh_TW
DC.subject模擬時間zh_TW
DC.subject加速zh_TW
DC.title晶圓圖群集隨機特徵加速運算核心zh_TW
dc.language.isozh-TWzh-TW
DC.titleAcceleration Core for the Calculation of the Randomness Features of Wafer Mapsen_US
DC.type博碩士論文zh_TW
DC.typethesisen_US
DC.publisherNational Central Universityen_US

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