| dc.description.abstract | 本論文報告利用有機金屬化學蒸氣沉積法成長氮化鎵高電子遷移率電晶體於矽基板上，並分析通道層磊晶條件與緩衝層結構變化對磊晶片結構特性與載子傳輸特性的影響。本研究發現，在成長AlGaN/GaN高電子遷移率電晶體通道層時，提高V/Ⅲ比能提升載子傳輸特性；而改變載氣(氫氣、氮氣)會明顯影響其表面形貌、粗糙度與異質界面品質。二次離子質譜儀測量的結果顯示使用氮氣載氣能降低通道層的碳背景濃度達50%，改善背景雜質散射機制，低溫(10 K)下電子遷移率可以達到27,000 cm2/V-s。但是在氮氣載氣環境下成長之樣品其二維電子氣濃度都比較低，這是因為在高V/III比下，三甲基鋁有較嚴重的預先反應，造成位障層之鋁成分下降所致。而在使用三乙基鎵取代三甲基鎵成長通道層時，由於二者之化學分解反應有所差異，其碳背景濃度可進一步降低，使低溫電子遷移率更是高達28,000 cm2/V-s。另外於緩衝層結構的研究方面，本研究將AlxGa1-xN/AlyGa1-yN超晶格置於與矽基板適當距離以及改變超晶格鋁成分與厚度之組合，可使緩衝層缺陷密度下降，其主要原因是與壓縮應力層的應力釋放有關，尤其是刃差排型態的缺陷隨其變化最為明顯。而透過此複合式超晶格緩衝層結構，我們獲得非常優良之AlInN HEMTs載子傳輸特性，其室溫電子遷移率為1,940 cm2/V-s、二維電子氣濃度為1.46×1013 cm-2以及片電阻為221.4 Ω/□；而低溫霍爾量測結果顯示，電子遷移率可由無超晶格結構的9,020 cm2/V-s提升至12,300 cm2/V-s。除此之外，從緩衝層垂直漏電流以及電流-電壓遲滯曲線測量結果得知，電性會因緩衝層總缺陷密度的下降有所改善；而緩衝層中的刃差排缺陷密度會影響其漏電流隨電壓增加的上升速率，在具有最高刃差排缺陷的樣品中有最緩慢的漏電流上升速率。最後以此複合式緩衝層結構為基礎，藉由增加超晶格的對數提升緩衝層材料結構的剛性係數(K)，本研究得以達到晶圓翹曲僅有44 μm而厚度可達5 μm的6吋矽基氮化鎵高電子遷移率電晶體磊晶片。 | zh_TW |
| dc.description.abstract | In this work, an in-depth study of the channel and buffer layers of MOCVD grown (Al,In,Ga)N/GaN-on-Si high electron mobility transistors (HEMTs) is carried out systematically. It is found that a higher V-III ratio during the growth of the channel layer of an AlGaN/GaN HEMT, significantly improves the electron transport properties. Moreover, the choice of carrier gases such as H2 and N2, considerably affects the surface morphology, roughness and the overall quality of the heterointerface. Secondary ion mass spectroscopy (SIMS) measurements further indicate up to 50% reduction in the residual carbon concentration in the GaN layer by the use of N2 carrier gas. As a result, the electron mobility in those heterostructures reaches up to 27,000 cm2/V-s at 10K, possibly due to a notable reduction in interface roughness and background impurity scattering. However, the AlGaN barrier when grown in N2 ambient with high V/III ratio, shows a drop in the two dimensional electron gas density (2DEG) due to a strong pre-reaction of TMAl, causing a decrease in aluminum composition in the AlGaN barrier layer. Further changing the Ga precursor from trimethylgallium (TMG) to triethylgallium (TEG) leads to about an order of magnitude reduction in background carbon concentration in the GaN channel layer and results in further increase in electron mobility up to 28,000 cm2/V-s at 10K. Furthermore, high quality buffer layer for GaN-on-Si HEMTs has been obtained by employing superlattices (SLs) structures with different stress mitigating buffer schemes, including different compositions, SL thickness as well as at different positions in the entire buffer layer. The edge dislocation density decreases from 5.03x108 cm-2 in the heterostructure without SLs to 1.43x108 cm-2 with the use of superlattice structures by minimizing overall compressive strain in the GaN layer. The AlInN/GaN heterostructures when employed with these SLs buffers, demonstrate an electron mobility of 1,940 cm2/V-s, a 2DEG density of 1.45x1013 cm-2 and a sheet resistance as low as 221 Ω/□. A significant increase in low temperature mobility from 9,020 cm2/V-s to 12,300 cm2/V-s is also obtained possibly due to the reduction in dislocation scattering. Decrease in vertical leakage current and hysteresis is also observed on this sample. It is found that higher edge type dislocation density seems to be beneficial for reducing the rise rate of the vertical buffer leakage current. By adjusting the stiffness coefficient (K) of the buffer structure with increasing the pair of superlattice, a 5 μm thick AlGaN/GaN heterostructure on 150 mm diameter silicon substrate is demonstrated with a wafer bow of 44 μm only. | en_US |