| DC 欄位 |
值 |
語言 |
| DC.contributor | 電機工程學系 | zh_TW |
| DC.creator | 李艾芳 | zh_TW |
| DC.creator | Ai-Fang Li | en_US |
| dc.date.accessioned | 2021-11-29T07:39:07Z | |
| dc.date.available | 2021-11-29T07:39:07Z | |
| dc.date.issued | 2021 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=108521027 | |
| dc.contributor.department | 電機工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 2013年德國政府提出「工業 4.0」的高科技計畫，可大幅改善傳統生產製造效率，為了能有效處理大量的資料，高效率及快速讀寫的設備扮演著重要的角色。其中SRAM具有快速讀寫的優勢，若能在斷電後仍能保留資料，便可大幅的降低功率耗損。近年來鐵電材料因與目前CMOS技術具有兼容性且可微縮的優勢，其中鐵電非揮發性SRAM極具潛力同時達到快速操作及超低功耗等功能需求。
本篇論文著重探討兩種6T2C NVSRAM的召回操作設計(Type-1及Type-2)，並利用TCAD模擬軟體結合Preisach model來模擬鐵電電容。考慮在最嚴苛的閾值電壓變異(△VTH)情況下，比較電晶體變異對兩種NVSRAM召回操作的影響。結果顯示當增加剩餘極化(Pr)、減少鐵電介電係數(εFE)或矯頑電場(Ec)，召回操作表現上可獲得更好的變異度免疫力。除此之外，Type-2召回操作在優化的鐵電電容面積下，當飽和極化(Ps)接近剩餘極化時，可容忍閾值電壓變異度為116 mV，比Type-1召回操作大4.46倍。
在附錄部分，我們提出記憶體視窗(Memory window)模型架構，透過數學模型去分析不同鐵電材料參數在飽和迴圈下，對非揮發性鐵電場效電晶體記憶視窗的影響，結果顯示在足夠電壓情況下，當剩餘極化或矯頑電場增加時，可增加記憶視窗及鐵電記憶的穩定性。 | zh_TW |
| dc.description.abstract | Industry 4.0 was proposed by the German government in 2013, which can improve the efficiency of conventional industries. To process lots of data, low power consumption and high-speed devices play essential roles. The SRAM possesses the advantage of high speed. If it can recover the data after the power down, the power consumption will be reduced. Recently, ferroelectric-based materials have been widely studied for nonvolatile memory applications because of their advantage of high CMOS compatibility. Therefore, ferroelectric nonvolatile SRAM (FE-NVSRAM) presents great potential to meet the requirements of high-speed operation and low-power consumptions.
This work compares different recall operations for 6T2C NVSRAM using the TCAD simulation with the Preisach model. For the first time, we have studied the impact of device variations on the recall operations. Two recall schemes (Type-1 and Type-2) are compared, considering the worst threshold mismatch (∆VTH) scenarios. During the recall operation, as the Ec and εFE reduce, or Pr increases, the NVSRAM shows higher immunity to threshold mismatch. Besides, the Type-2 recall scheme with the optimized ferroelectric area can tolerate 116mV threshold voltage mismatch, which is 4.46 times larger than the Type-1 recall scheme.
In the appendix, we have proposed a framework to analyze the impact of various device parameters on the memory window of FeFET in the saturation loop. The memory window (MW) can increase with the rising of Ec and Pr when sufficient voltage supply is used to program the FeFET, which enhances the MW and improves the reliability. | en_US |
| DC.subject | 非揮發性靜態隨機存取記憶體 | zh_TW |
| DC.subject | 鐵電電容 | zh_TW |
| DC.subject | 變異容忍性 | zh_TW |
| DC.subject | 記憶視窗 | zh_TW |
| DC.subject | nonvolatile SRAM (NV-SRAM) | en_US |
| DC.subject | ferroelectric capacitor | en_US |
| DC.subject | variation-tolerant | en_US |
| DC.subject | memory window (MW) | en_US |
| DC.title | 應用於非揮發性鐵電靜態隨機存取記憶體之變異容忍性召回操作 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | Variation-Tolerant Recall Operation for Nonvolatile Ferroelectric-based SRAM | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |