| dc.description.abstract | With the prosperity of the semiconductor industry, wafer map analysis is a very important issue. By analyzing the wafer map defect patterns, we can know the corresponding process problems and adjust the machine at different root causes, for example: in chip probing, test probe may stick something after multiple tests, which may cause the probe cannot effectively contact the pad of the test wafer, and lead to the test patterns may not be correctly input into the test circuit, that let the test result be bad. This paper mainly uses Feature-base analysis to identify and analyze the scratch defect pattern, and use Hough transform to propose a identification model to decide whether have line or arc defects on the wafer map. The actual wafer map we used is WM-811K wafer database provided by TSMC. The defect patterns can be divided into the following nine types: Center, Donut, Scratch, Edge-Ring, Edge-Loc, Loc, Near- Full, Random, None. Finally, take part of WM-811K as the test data, and use the numerical performance of Accuracy, Precision, and Recall to show the classification accuracy of the model in this paper. Based on this model, Single type scratch recognition accuracy could achieve 95.45%, Multiple type scratch recognition accuracy is 76.21%. Calculation time cost is about 3.92 ms/wafer. | en_US |