| dc.description.abstract | In this thesis, we implemented Ka-band digital passive phase shifters based on the theory of transmission line-based all-pass network.
Chapter 2 focuses on the redesign of a 90◦ phase shifter at the center frequency of 35 GHz in the Ka-band, utilizing the transmission line-based all-pass network architecture and TSMC 0.18-µm CMOS process. The circuit is a redesign of the transmission line-based all-pass network 35 GHz 90◦ phase shifter previously designed by Senior Hung Chih-En.
Comparing Hung′s measurements and simulations indicates a reduction in phase shift and a movement of frequency response offset. Based on the re-simulation results of Senior Hung Chih-En, we redesigned the theoretical values of the transmission line and capacitance of this circuit to obtain a better frequency response. Simulation results indicate the phase error is within 3◦ and the corresponding bandwidth is 26.8 % (33.8-44.3 GHz) with return losses bigger than 19.1 dB within the bandwidth, insertion loss below 6.3 dB, and amplitude error within ±0.98 dB.
Measurement result demonstrates that the phase error is within 3◦ and the bandwidth is 30.0 % (36.1-48.7 GHz). Return loss within the bandwidth is above 14.2 dB, insertion loss is below 6.1 dB, and amplitude error is within ±0.6 dB. The measurement indicates that We increased the bandwidth of the senior′s circuit from 22.5 % to 30.0 % and made the phase shift oset closer to the simulation results, which aligns with the redesign objectives.
Chapter 3 presents the design of a four-bit passive phase shifter in the Ka-band, based on the transmission line-based all-pass network architecture and TSMC 0.18-µm CMOS process. The circuit is a redesign of Senior Hong Wei-Hong′s four-bit transmission line-based all-pass network phase shifter. The senior′s measurement results indicate that the root mean square phase errors exceed 19.2◦, as well as the phase shift
decreases and shifts toward higher frequencies, highlighting the circuit′s objective of mitigating phase errors and addressing high-frequency offsets. The 22.5◦, 45◦, and 90◦ phase shift stages employ single-stage transmission line-based all-pass network, while the 180◦ stage is composed of
two in-series transmission line-based all-pass networks with different center frequencies (22 GHz and 51 GHz) referred to as low-band (LB) and high-band (HB). The circuit operates at a center frequency of 35 GHz with a characteristic impedance of 25 Ω, using 50 Ω for transmission line characteristic impedance and an electrical length of 30◦. Simulations show a phase error below 3◦ over a corresponding bandwidth of
19.3% (33.2-40.3 GHz). Measurement shows that the phase shift in various states reduced, trending towards higher frequency. Therefore, the bandwidth is rede ned as phase errors within 10◦, achieving a bandwidth of 17% (36.2-42.9 GHz) within this criteria. Comparing with the measurement results of the senior′s paper [2], we can see that we have
reduced the minimum root mean square phase error from 19.2◦
to 7.5◦ and improved the frequency response offset of phase shift.
In the second chip, we added ideal components to the circuit to simulate process variations and redesigned the transistor and capacitor values to make the simulation results fit the measurement results. The measurement results of the redesign show that the 180◦ phase shift decreased and each stage shifts towards higher frequencies; the root mean square phase error is higher than 3◦, so we redefined the bandwidth as the root mean square phase error is within 6◦. The bandwidth within the frequency band can reach 20.5 % (35.043.0 GHz). In this circuit′s redesign, we reduced the minimum root mean square phase error of the senior′s circuit from 19.2◦ to 4◦, and adjusted the circuit center frequency
from 45 GHz to 38 GHz, thus verifying the improvement of the circuit′s redesign. And the subsequent re-simulation, the simulation results are close to the measurement results. In the subsequent re-simulation, we simulate the parasitic effect of the components that make the simulation results close to the measurement results. | en_US |