| dc.description.abstract | This paper focuses on the design and implementation of Radar Target Emulator and Pulse Radar in the RFSoC Platform Environment. The Radar Target Emulator is employed to simulate the effects of time-varying channels, including time-varying delay, Doppler frequency shift, signal attenuation and gain. Pulse Radar, a commonly used radar system, maintains a constant signal level for each pulse signal within its duration, reducing the complexity of signal processing. The purpose of the Pulse Radar is to validate the Radar Target Emulator.
This paper presents the implementation of Radar Target Emulator and Pulse Radar transmitter and receiver system on two ZCU111 boards. One board is used as the Pulse Radar, and the other as the Radar Target Emulator. The radar signal is
generated on the ZCU111 board acting as the Pulse Radar and is sent to the Radar Target Emulator’s ADC via radar’s DAC. The Radar Target Emulator then emulates the target signal based on designed time-varying delay, phase variation and signal attenuation. The output from the Radar Target Emulator’s DAC is fed back to the radar’s ADC, and the receiver signal is then analyzed by the radar.
The hardware architecture employed in this paper is eight-way parallelized, incorporating modules such as the Pulse Radar Signal Generator module, Matched Filter module, Peak Detector module, Synchronous Receiver module, Delay module
(Block RAM), Phase Rotation module (Cordic), Signal Attenuation module, and RF Data Converter. | en_US |