| DC 欄位 |
值 |
語言 |
| DC.contributor | 通訊工程學系 | zh_TW |
| DC.creator | 張喜豪 | zh_TW |
| DC.creator | Hsi-Hao Chang | en_US |
| dc.date.accessioned | 2023-12-22T07:39:07Z | |
| dc.date.available | 2023-12-22T07:39:07Z | |
| dc.date.issued | 2023 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=110523046 | |
| dc.contributor.department | 通訊工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | DVB-S2(X)是由數位電視廣播（DVB）組織制定的第二代數位衛星廣播擴展版標準，旨在提供更高效、更可靠的衛星通信。它採用了更高頻帶利用率的調製方式，並使用了強大的BCH和LDPC碼級聯通道編碼技術，以提高系統性能。
本論文的主要目標是在Xilinx公司的RFSoC ZCU111平台上實現DVB-S2(X)高通量發射機。該發射機支援多種MODCOD（Modulation and Coding）配置，包括DVB-S2 Short FEC Frame和部分DVB-S2X Short FEC Frame，同時具有256MSPS的符碼率。論文的重點在於通過平行化架構實現LDPC編碼器，以提高傳輸吞吐量，並確保其能夠操作在256MHz的時脈下。 這項工作旨在實現一個高性能的DVB-S2(X)發射機，以應對衛星通信領域中的挑戰。 | zh_TW |
| dc.description.abstract | DVB-S2(X) is the second-generation digital satellite broadcasting extended standard developed by the Digital Video Broadcasting (DVB) organization. Its primary goal is to provide more efficient and reliable satellite communication. It adopts modulation techniques that offer higher bandwidth utilization and employs robust BCH and LDPC code concatenation channel coding techniques to enhance system performance.
The main objective of this thesis is to implement a high-throughput DVB-S2(X) transmitter on the Xilinx RFSoC ZCU111 platform. This transmitter supports various MODCOD (Modulation and Coding) configurations, including DVB-S2 Short FEC Frame and partial DVB-S2X Short FEC Frame, while maintaining a symbol rate of 256MSPS. The focus of the thesis lies in implementing an LDPC encoder through a parallelization architecture to improve transmission throughput and ensure operability at a 256MHz clock rate. This work aims to realize a high-performance DVB-S2(X) transmitter to address the challenges in the satellite communication field, particularly in scenarios involving high data rates and long-distance transmissions. | en_US |
| DC.subject | 第二代數位衛星廣播擴展版 | zh_TW |
| DC.subject | LDPC通道編碼 | zh_TW |
| DC.subject | 平行化架構 | zh_TW |
| DC.subject | 射頻系統晶片 | zh_TW |
| DC.subject | 現場可程式化邏輯閘陣列 | zh_TW |
| DC.subject | 高吞吐量 | zh_TW |
| DC.subject | 發射機 | zh_TW |
| DC.subject | DVB-S2(X) | en_US |
| DC.subject | LDPC code | en_US |
| DC.subject | parallel architecture | en_US |
| DC.subject | RFSoC | en_US |
| DC.subject | FPGA | en_US |
| DC.subject | High Throughput | en_US |
| DC.subject | Transmitter | en_US |
| DC.title | 以RFSoC平台設計與實現DVB-S2(X)高吞吐量發射機 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | Design and Implementation of High Throughput Transmitter for DVB- S2(X) with RFSoC Platform | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |