博碩士論文 87324002 完整後設資料紀錄

DC 欄位 語言
DC.contributor電機工程學系zh_TW
DC.creator莊家碩zh_TW
DC.creatorJia-Soy Chuangen_US
dc.date.accessioned2000-7-18T07:39:07Z
dc.date.available2000-7-18T07:39:07Z
dc.date.issued2000
dc.identifier.urihttp://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=87324002
dc.contributor.department電機工程學系zh_TW
DC.description國立中央大學zh_TW
DC.descriptionNational Central Universityen_US
dc.description.abstract在本論文中, 以應用於藍芽無線接收系統的來探討射頻前級的整合性,並且針對系統規格提出適用於藍芽系統之低中頻接收機,所有的線路包含有低雜訊放大器,混波器,鏡相消除濾波器, 及正交信號產生器, 模擬上顯示鏡相消除為30dB, 雜訊指數為15.2dB, 敏感度-70.8dBm, 電壓增益35.8dB, 三階信號交會點-14dBm. 使用3.3V的電壓, 及台灣積體電路公司所提供 0.6微米 SPTM 金氧半場效應電晶體, 功率消耗為250mW, 面積是3000微米4000微米.zh_TW
dc.description.abstractSince the rapid development of the CMOS technology, a RF analog front-end receiver can be integrated on a single chip. This thesis introduces a highly integrated RF receiver front end for Bluetooth system. This front-end design composed of low noise amplifier, two downconversion mixers, passive polyphase with buffers, and active polyphase filter. It receives the 2.4GHz desired high frequency signal ,and then translates it to 700KHz. Besides downconversion, it also needs image rejection by active polyphase filter. At last, it generates I_Q path and feed I_Q to baseband. Before I_Q fed into baseband, it needs AGC to reduce the dynamic range (44dB) and SAW filter as channel select filter. The design of AGC is not included in the thesis. The whole analog front-end is implemented by using TSMC 0.6um SPTM standard CMOS technology under 3.3V power supply. It has 35.8dB cascaded gain, 15.2dB noise figure, 24dB image rejection ratio, -14dBm IIP3. The total RF front-end power consumption is about 250mW. The total chip area is .en_US
DC.subject藍芽zh_TW
DC.subject射頻電路zh_TW
DC.subjectBluetoothen_US
DC.subjectRF Circuiten_US
DC.title應用於藍芽系統之CMOS射頻前端電路設計zh_TW
dc.language.isozh-TWzh-TW
DC.titleRF CMOS Front-End Circuit Design for Bluetooth Receiveren_US
DC.type博碩士論文zh_TW
DC.typethesisen_US
DC.publisherNational Central Universityen_US

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