| dc.description.abstract | Since the usage for digital imagery becoming popular in our world today, the still image compression standards that are able to provide the efficient representation and more features for different application are necessary. A new still image standard, JPEG2000, supplies not only higher compression performance but also various functionalities. Thus the commonly used standard, JPEG, can’t contend with.
This thesis focuses on the analysis and architecture design for a JPEG2000 still image encoding system. We firstly introduce the fundamental concepts of JPEG2000 encoding system. It consists of three major block, DWT, scalar quantization, and EBCOT. Then we analyze this system with several experiments. Based on the experiment results, the bottleneck for JPEG2000, EBCOT, is found. In this regard, some strategies for decreasing the computation time of EBCOT are discussed. In order to improve the EBCOT algorithm, Clean Up Pass Skipping method (CUPS) and Pass Predicting method (PP) are proposed. We verify the CUPS and PP methods by completed simulation on VC++ environment and they can reduce the 43% clock cycles for EBCOT context modeling.
Moreover, we achieve the efficient hardware architecture for the JPEG2000 encoding system. A new folded architecture for lifting-based DWT is presented. This design has the advantages of high hardware utilization and low area consumption. The architecture design for scalar quantization with VTQ is implemented. Using VTQ helps with reducing the computation time for EBCOT more efficiently than using DTQ. For the architecture design of EBCOT context modeling, proposed speed-improved methods are included. The CUPS method only needs an accumulator to sum up the number of coefficient-bits in a bitplane that have been coded in Pass1 and Pass2. The PP method requires extra combinational logic circuits and two predict tables to record the addresses when the Pass1 and Pass2 coding are needed. A few components can improve the speed efficiency. | en_US |