博碩士論文 89521018 完整後設資料紀錄

DC 欄位 語言
DC.contributor電機工程學系zh_TW
DC.creator李思儒zh_TW
DC.creatorSzu-Ju Lien_US
dc.date.accessioned2002-6-28T07:39:07Z
dc.date.available2002-6-28T07:39:07Z
dc.date.issued2002
dc.identifier.urihttp://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=89521018
dc.contributor.department電機工程學系zh_TW
DC.description國立中央大學zh_TW
DC.descriptionNational Central Universityen_US
dc.description.abstract本論文主要以分析撞擊游離(impact-ionization)的機制並建立一維及二維的撞擊游離等效電路模型。在二維模型的建立上,我們同時探討於二維x-y方向的電場與電流密度分布以及撞擊游離的機制在描述元件的接面上所發生的累增崩潰(avalanche breakdown)。因此,在建立起一維及二維撞擊游離等效電路模型後,我們使用一維及二維的二極體與雙載子接面電晶體來驗證其模型的正確性並比較其撞擊游離的機制效應。在撞擊游離等效電路模型的應用上,我們使用Thyristor功率元件來觀察撞擊游離的效應。同時於更深入的呈現元件的SCR特性曲線,我們利用了調變外加電壓移動負載線(load line)來尋找保持電流(holding current)。最後,在Thyristor功率元件的模擬方面,面臨到數值運算上的困難,因此我們採用regrid的方法來加強程式的收斂性。zh_TW
dc.description.abstractIn this thesis, we analyse the impact-ionization mechanism and build up 1D and 2D impact-ionization circuit model. In 2D environment, we study the two- dimensional x-y directions distributions in electric field and current density. The impact-ionization mechanism causes the junction avalanche breakdown. Therefore, after building up the 1D and 2D impact-ionization model, we use 1D and 2D PN diode and BJT for verification. In device application, we use the power device thristor to observe impact-ionization effects. To present complete SCR characteristics, we use the load line concept with modulating applied bias to find the holding current. Last, in SCR simulation, we face the numerical computing challenge, and we use the regrid method to enhance the program convergence.en_US
DC.subject撞擊游離zh_TW
DC.subject等效電路模型zh_TW
DC.subject半導體元件模擬zh_TW
DC.subjectimpact ionizationen_US
DC.subjectsimulationen_US
DC.subjectSCRen_US
DC.title撞擊游離的等效電路模型與其在半導體元件模擬上之應用zh_TW
dc.language.isozh-TWzh-TW
DC.titleAn Equivalent Circuit of Impact-Ionization and its Applications on Semiconductor Devicesen_US
DC.type博碩士論文zh_TW
DC.typethesisen_US
DC.publisherNational Central Universityen_US

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