博碩士論文 90324004 完整後設資料紀錄

DC 欄位 語言
DC.contributor化學工程與材料工程學系zh_TW
DC.creator林永河zh_TW
DC.creatorYeong-Her Linen_US
dc.date.accessioned2003-6-30T07:39:07Z
dc.date.available2003-6-30T07:39:07Z
dc.date.issued2003
dc.identifier.urihttp://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=90324004
dc.contributor.department化學工程與材料工程學系zh_TW
DC.description國立中央大學zh_TW
DC.descriptionNational Central Universityen_US
dc.description.abstract本論文報導覆晶封裝之銲點中電遷移所引起之銅墊層快速溶解現象。實驗之試片包含組成為錫鉛共晶之銲點,這些銲點接合了矽晶片與印刷電路板。在矽晶片端之金屬墊層是純銅,而在印刷電路板端之金屬墊層是金/鎳/銅之三層結構。將這些銲點通入不同方向之電流, 電流密度值為 2×104 A/cm2 與 4×104 A/cm2,而環境溫度設定為室溫、70℃與100℃。不論何種電流密度或溫度, 通電之銲點皆因為非對稱之區域性銅溶解現象而失效。此現象發生在陰極電子流入之區域晶片端。這些被溶解之銅會以銅原子之型態遷移至錫鉛銲點中與錫原子反應生成Cu6Sn5之界金屬沉積於陽極電子流出之區域電路板端。造成區域性銅溶解的發生是因為高電流密度所引發的電遷移效應,及巨大的電流密度差所造成之電子流擁擠現象。這些銅溶解之區域會被銲點中之銲料所迴填(銲料移動之方向與電子流相反)。銲點失效之位置皆發生在迴填銲料與殘存銅導線之間,這是因為迴填入導線之錫鉛銲料必須承受更高之電流密度(由於導線之截面積小於銲點之截面積)。然而,電遷移所引起之銅墊層快速溶解並不會發生於印刷電路板端,因為銅上覆蓋一層鎳。而鎳墊層有較好之抗電遷移能力。因此,我們可得知在覆晶封裝應用上,可利用鎳層之保護防止銅溶解現象。zh_TW
dc.description.abstractThe phenomenon of Cu dissolution induced by electromigration at flip chip solder joints is reported. A pair of eutectic Sn-Pb solders interconnected between a Si chip and a FR4 substrate is under current stressing with opposite electron current direction. The local current density in the solder ball and in the Cu conducting trace is 2x104 A/cm2 and 4.6x105 A/cm2 respectively. The ambient temperatures are set at 70 oC and 100 oC. The under-bump metallization (UBM) on the chip side is the Cu pad with a conducting trace and on the substrate side is Au/Ni/Cu three-layer structure. No matter what ambient temperature is, the solder joints failed due to an asymmetrical and localized dissolution of the Cu metallization on the cathode side. The rate of Cu dissolution at the ambient temperature of 100 oC is faster than at 70 oC. The dissolved Cu, including the Cu pad and the Cu conducting trace on the chip side, migrated into solder to form the Cu6Sn5 intermetallics deposited on the substrate side. The Cu atoms drifted to the anode side due to electromigration induced by high current density and current crowding effect caused by huge gradient of current density. The dissolution of Cu coincides with solder back-filled. The site of failure was at the conducting trace that had been back-filled with solder, where a much greater current density was present due to a smaller cross-section. An in-situ experiment is taken at the current density of 4x104 A/cm2 and room temperature of 30 oC. The phenomenon of Cu dissolution can also be observed on the chip side. Thus, Cu dissolution can be induced at room temperature when the current density is high enough. The phenomenon of Cu dissolution does not happen on the substrate side, because this Cu is protected by a layer of Ni. Controlling the thickness of Ni UBM can inhibit the electromigration effect in flip chip packages because the Ni has good electromigration resistance.en_US
DC.subject覆晶封裝zh_TW
DC.subject電遷移zh_TW
DC.subject銅溶解zh_TW
DC.subject銅製程zh_TW
DC.subject可靠度zh_TW
DC.subjectFlip chip packagesen_US
DC.subjectElectromigrationen_US
DC.subjectCu dissolutionen_US
DC.subjectCu interconnecten_US
DC.subjectReliabilityen_US
DC.title覆晶封裝中電遷移效應導致之銅溶解現象zh_TW
dc.language.isozh-TWzh-TW
DC.titleElectromigration Induced Cu Dissolution in Flip Chip Packagesen_US
DC.type博碩士論文zh_TW
DC.typethesisen_US
DC.publisherNational Central Universityen_US

若有論文相關問題,請聯絡國立中央大學圖書館推廣服務組 TEL:(03)422-7151轉57407,或E-mail聯絡  - 隱私權政策聲明