| DC 欄位 |
值 |
語言 |
| DC.contributor | 電機工程學系 | zh_TW |
| DC.creator | 李銘寰 | zh_TW |
| DC.creator | Ming-Huan Lee | en_US |
| dc.date.accessioned | 2010-7-20T07:39:07Z | |
| dc.date.available | 2010-7-20T07:39:07Z | |
| dc.date.issued | 2010 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=92541009 | |
| dc.contributor.department | 電機工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 本論文提出一低單價以場可程式邏輯閘陣列（FPGA）為基礎之大腦人機介面（BCI）系統，有別於其它相關研究採用腦電波（EEG）訊號擷取儀器與個人電腦等相關周邊儀器設備。本論文所提之低單價大腦人機介面系統主要包含有：1)以發光二極體（LED）為基礎之閃光誘發面板、2)腦電波訊號擷取電路、與3)以場可程式邏輯閘陣列為基礎之腦電波訊號處理單元。論文所提系統具有即時腦電波訊號處理之能力，並且以穩態視覺誘發電位（SSVEP）作為大腦人機介面之輸入訊號。使用發光二極體能較傳統陰極射線管（CRT）與液晶平面顯示器（LCD）誘發出較強的穩態視覺誘發電位。為了提高腦電波訊號量測的正確性與穩定性並降低環境相關因數等干擾，自製之腦電波訊號擷取電路具有自動停帶調整控制與自動輸出增益/準位調整控制等功能。為了使用較少的閃光誘發頻率來實現多個穩態視覺誘發選項，腦電波訊號處理單元採用單頻多相位編碼技術驅動閃光誘發面板以及辨識所擷取到的穩態視覺誘發電位。透過本系統，使用者可以只藉由其自身腦電波訊號來控制周邊多媒體等裝置。論文所實現之大腦人機介面系統其平均傳輸率（ITR）可達 24.67 位元/秒，並且由實驗結果可知所提之系統具有高達 89.29% 的腦電波訊號辨識正確率。
| zh_TW |
| dc.description.abstract | This dissertation proposes a low-cost field-programmable gate array (FPGA)-based brain–computer interface (BCI) multimedia control system, different from the BCI system, which uses bulky and expensive electroencephalography (EEG) measurement equipment, personal computer, and commercial real-time signal-processing software. The proposed system combines a customized stimulation panel, a brainwave-acquisition circuit, and an FPGA-based real-time signal processor and allows users to use their brainwave to communicate with or control multimedia devices by themselves. This study also designs a light-emitting diode (LED) stimulation panel instead of cathode ray tube (CRT) or liquid-crystal display (LCD) used in existing studies, to induce a stronger steady-state visual evoked potential (SSVEP), a kind of EEG, used as the input signal of the proposed BCI system. Implementing a prototype of the SSVEP-based BCI multimedia control system verifies the effectiveness of the proposed system. The proposed system has reached an average transfer rate about 24.67 bits/min for normal subjects. Experimental results show that the subjects’ SSVEP can successfully control the multimedia device through the proposed BCI system with high identification accuracy.
| en_US |
| DC.subject | 場可程式邏輯閘陣列 | zh_TW |
| DC.subject | 穩態視覺誘發電位 | zh_TW |
| DC.subject | 大腦人機介面 | zh_TW |
| DC.subject | 浮點運算單元 | zh_TW |
| DC.subject | Field-programmable gate array (FPGA) | en_US |
| DC.subject | Floating-point | en_US |
| DC.subject | Brain–computer interface (BCI) | en_US |
| DC.subject | Steady-state visual-evoked potential (SSVEP) | en_US |
| DC.title | 以場可程式邏輯閘陣列為基礎之穩態視覺誘發電位腦波人機介面系統設計與實現 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | Design and Implementation of FPGA-Based Steady-State Visual Evoked Potential Brain–Computer Interface System | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |