| DC 欄位 |
值 |
語言 |
| DC.contributor | 機械工程學系在職專班 | zh_TW |
| DC.creator | 黃銘德 | zh_TW |
| DC.creator | Ming-Te Huang | en_US |
| dc.date.accessioned | 2010-7-22T07:39:07Z | |
| dc.date.available | 2010-7-22T07:39:07Z | |
| dc.date.issued | 2010 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=93333018 | |
| dc.contributor.department | 機械工程學系在職專班 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 晶圓生產良率的提升一直是半導體業界努力積極力找尋的低投資成本目標，然而面對製程技術不斷的提升以及奈米技術的進階發展，製程技術已從早期低階125 nm / 110 nm 奈米製程進而發展演進至現今高階奈米技術 90 nm / 70 nm/ 60 nm / 50 nm / 40 nm…..等。然而吸附於矽晶圓薄膜表面的分子機載源污染（AMC, Airborne Molecular Contamination）對矽晶圓製程在高階奈米技術的開發中，被視為生產良率與技術競爭力提升的一個議題，因為矽晶圓會隨著時間與無塵室環境中的有機物質與酸鹼物質反應，進而使得分子機載源污染成為矽晶圓表面之吸附物，此分子機載源污染的吸附結果而造成矽晶圓薄膜厚度量測的不穩定性。
尤其現在閘極氧化層(Gate Oxide, SiO2) 厚度隨著高階奈米製程的需求已愈作愈薄，其氧化層厚度已從90 nm 製程所要求的100 Å 演變成現今50 nm 製程所需求的30 Å，而且分子機載源污染的吸附生成與成長對如此薄的閘極氧化層來說，會因為分子機載源污染的吸附而造成更大的薄膜厚度量測值誤差值。尤其是該閘極氧化層厚度的誤差值量測會導致介電層的漏電流現象而影響電晶體的電性，進而影響矽晶圓的製程能力與生產良率。
如今業界對此分子機載源污染的成長做了不同的預防與檢測，不同方法對矽晶圓廠實際運用上有著不同的技術考量。因此，此報告為研究利用雷射去除法將矽晶圓閘極氧化層表面已吸附的分子機載源污染去除，並經由實驗數據分析以得到雷射設定參數最佳化之後，使得閘極氧化層厚度量測在高階奈米技術中成為一個具有可靠度的量測。
| zh_TW |
| dc.description.abstract | Semiconductor industry keeps searching for low cost investment. Wafer manufacturing trends to improve yield in order to reach the goal of cost reduction. The nanometer technology development keeps moving forward to progress from 125 nm process to 40 nm process；that is from low-end to high-end technology. However, the airborne molecular contamination (AMC) that is readily to adhere to wafer thin film is considered as a barrier for improving yield and competitiveness, which should be eliminated in the progress of high-end technology development. Affected by the processing time, AMC reacts with organic atmosphere from environment leading to be absorbable on wafers, the existence of AMC affects the thin film quality and impacts
the thin film metrology.
Nowadays, the gate oxide is getting thinner due to the requirement of high-end technology. The thickness is from 100 Å for 90 nm process to 30 Å for 50 nm process.
The growth of AMC on gate oxide builds up metrology gap between inspections. This gap results in current leaking at gate oxide to obtain a yield issue in the manufacturing
process.
Actions have been taken in industry to prevent AMC growth along with inspection of AMC. The manufacturing has different applications in practice according to different methodologies. This study focuses on AMC elimination by laser and on optimization of laser parameters. The experimental results can assure the thickness metrology of gate oxide to be reliable value.
| en_US |
| DC.subject | 奈米技術 | zh_TW |
| DC.subject | 閘極氧化層 | zh_TW |
| DC.subject | 分子機載源污染 | zh_TW |
| DC.subject | yield improvement | en_US |
| DC.subject | nanometer technology | en_US |
| DC.subject | gate oxid | en_US |
| DC.title | 雷射去除矽晶圓表面分子機載污染參數的最佳化分析 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | Laser power setting optimization for AMC removal on silicon wafer | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |