博碩士論文 93521019 完整後設資料紀錄

DC 欄位 語言
DC.contributor電機工程學系zh_TW
DC.creator謝恂zh_TW
DC.creatorShyun Hsiehen_US
dc.date.accessioned2006-7-17T07:39:07Z
dc.date.available2006-7-17T07:39:07Z
dc.date.issued2006
dc.identifier.urihttp://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=93521019
dc.contributor.department電機工程學系zh_TW
DC.description國立中央大學zh_TW
DC.descriptionNational Central Universityen_US
dc.description.abstract傳統在做電路模擬分析時,往往將元件參數彼此間的變動視為獨立而不相關,但是電路在晶圓廠製造過程中,電晶體彼此間的參數變動會有某種程度的關聯性;故本論文主要是建立一個:引入元件參數彼此間有空間相關性的模擬方式,來分析雙級運算放大器效能的表現,並藉由此方法來找尋類比電路在佈局時電晶體最佳的擺放位置。zh_TW
dc.description.abstractWe used to treat the parameter between devices as independent in traditional circuit simulation. However, the parameter variation in each transistor should have certain correlation during manufacturing process. This thesis presents a methodology to simulate a two-stage OP-Amplifier with spatial correlation in each transistor parameter. Based on this method, the best transistor permutation in this analog circuit is found.en_US
DC.subject最佳佈局方式zh_TW
DC.subject不匹配zh_TW
DC.subject空間相關性zh_TW
DC.subjectparameter variationen_US
DC.subjectmismatchen_US
DC.subjectspatial correlationen_US
DC.title使用空間相關性分析之雙級運算放大器佈局zh_TW
dc.language.isozh-TWzh-TW
DC.titleTwo-Stage OP-Amp Layout by Spatial Correlation Analysisen_US
DC.type博碩士論文zh_TW
DC.typethesisen_US
DC.publisherNational Central Universityen_US

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