| DC 欄位 |
值 |
語言 |
| DC.contributor | 電機工程學系 | zh_TW |
| DC.creator | 游智嘉 | zh_TW |
| DC.creator | Chi-Chia Yu | en_US |
| dc.date.accessioned | 2006-7-18T07:39:07Z | |
| dc.date.available | 2006-7-18T07:39:07Z | |
| dc.date.issued | 2006 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=93521027 | |
| dc.contributor.department | 電機工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 摘要
在這篇論文裡，我們發展兩種方法改進記憶功率估計的準確。 我們提升的記憶體功率模型能不僅考慮記憶體的操作模式， 也考慮輸入位址切換的影響和從記憶體架構中得到不同大小記憶體之間的比例因子。 我們提出的方法可以有效的結合記憶體產生器產生任意大小的記憶體功率模型， 無需再對不同大小的記憶體再做一次功率模型。 接著提出來的Dummy Modular方法可以將我們的功率模型和商業估測功率軟體流程互相結合。 實驗結果已經顯示我們的記憶功率模型的平均誤差少於5%。 | zh_TW |
| dc.description.abstract | Abstract
In this work, we develop two methods to improve the accuracy of memory power estimation. Our enhanced memory power model can consider not only the operation mode of memory access, but also the address switching effect and the scaling factors that use the information of physical architecture. The proposed approach is very useful to be combined with memory compiler to generate accurate power model for any specified memory size without extra characterization costs. Then the proposed dummy modular approach can link our enhanced memory power model into commercial power estimation flow smoothly. The experimental results have shown that the average error of our memory power model is only less than 5%. | en_US |
| DC.subject | 記憶體 | zh_TW |
| DC.subject | 功率 | zh_TW |
| DC.subject | memory | en_US |
| DC.subject | power | en_US |
| DC.title | 通用LIB格式運用於尺寸可變的嵌入式記憶體功率模型 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | A Scalable Power Modeling Approach for Embedded Memory Using LIB Format | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |