| DC 欄位 |
值 |
語言 |
| DC.contributor | 電機工程學系 | zh_TW |
| DC.creator | 張紓萍 | zh_TW |
| DC.creator | Shu-Ping Chang | en_US |
| dc.date.accessioned | 2008-1-21T07:39:07Z | |
| dc.date.available | 2008-1-21T07:39:07Z | |
| dc.date.issued | 2008 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=945201002 | |
| dc.contributor.department | 電機工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 為了達到更好的壓縮率,包含一適應性可變長度熵編碼(CAVLC)器的無失真熵編碼器（Entropy encoder）被MPEG-4 AVC/H.264影像編碼器採用.相較於傳統的可變長度編碼器,適應性可變長度熵編碼器可以達到更好的編碼效率;但是相對的演算法的複雜度也比較高.另一方面,由於適應性可變長度熵編碼器存在著高度的資料相關性,因此在硬體實現方面也會變的比較複雜.同時,產出率也是一個重要的考量,特別是應用於處理高解析度的視訊影像.
隨著處理的視訊有越高的解析度,在編(解)碼時使用一個有效率的適應性可變長度熵編(解)碼器是很重要的.這份論文提出一個有效率而且低成本的適應性可變長度熵編碼器,可應用在MPEG-4 AVC/H.264相關的視訊編碼器.被提出的架構中,包含兩個主要的概念以及三個技術.第一個概念是,整合架構中掃瞄和編碼的部分;另外一個概念是利用一副輸入暫存器來達到每一個4x4方塊之間的管線功能.另外三個技術分別為,簡化七個使用於編碼非零值的表格,利用六種模式來決定目前的4x4方塊的參數nC以及減少用於nC產生器的記憶體使用量.這三個技術可以提高我們的編碼效率並且降低我們的成本.
並且,本文提出的適應性可變長度熵編碼器架構,已被燒錄到FPGA(型號為Xilinx Virtex-4 XC4VLX60),並且聯合H.264/AVC原始編碼C語言程式做驗證工作.編碼所產生的檔案(bitstream.264),經過H.264/AVC原始解碼C語言程式的解碼之後,所得到的檔案(bitstream.yuv)可以被成功的播放. | zh_TW |
| dc.description.abstract | In order to achieve the higher compression ratio, Context-Based Adaptive Variable Length Coding (CAVLC) is adopted as one of entropy encoder in MPEG-4 AVC/H.264 [1], [2]. Compared with the traditional entropy encoder, CAVLC can achieve better coding efficiency, but the algorithm complexity is higher. On the other hand, because of the data dependency in CAVLC, it results a complex CAVLC encoding in hardware implementation. At the same time, throughput is the other concern in CAVLC, especially for higher resolution video such as HDTV.
Deal with higher resolution of video information, encoding (or decoding) with an efficient CAVLC encoder is important. In this paper, an efficient and low cost CAVLC encoder is proposed for video coding applications of MPEG-4 AVC/H.264. Two main concepts are proposed to increase the throughput. One is the combination of scan phase and coding phase; the other is the block-based pipelining by the associated input buffer. We also propose three schemes to speed up the coding efficiency as well as reduce the area cost. One is to simplify the seven LEV-VLCN tables used by level coding. Another is to generate the nC value according to six block modes. The last one is to reduce the memory size used by nC generator.
And the proposed CAVLC design is downloaded to FPGA (Xilinx Virtex-4 XC4VLX60), and co-simulation with the h.264 source JM10.1 encoder c program for further verification. The encoded bitstream file (bitstream.264) can be decoded by h.264 source JM10.1 decoder c program and played successfully. | en_US |
| DC.subject | 適應性可變長度編碼器 | zh_TW |
| DC.subject | 有效率 | zh_TW |
| DC.subject | 低成本 | zh_TW |
| DC.subject | h.264 | en_US |
| DC.subject | CAVLC | en_US |
| DC.title | 一應用於MPEG-4 AVC/H.264有效率且低成本之適應性可變長度編碼器設計之實現 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | Implementation of an Efficient and Low Cost CAVLC for MPEG-4 AVC/H.264 Video Coding Application | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |